Alternatives and similar repositories for PandABlocks-FPGA

Users that are interested in PandABlocks-FPGA are comparing it to the libraries listed below

• opalkelly-opensource / design-resources
  A collection of Opal Kelly provided design resources
  ☆17Updated 3 weeks ago
• lnls-dig / dsp-cores
  Repository containing the DSP gateware cores
  ☆13Updated last week
• GSI-CS-CO / bel_projects
  GSI Timing Gateware and Tools
  ☆14Updated this week
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆30Updated 5 years ago
• lnls-dig / general-cores
  general-cores
  ☆21Updated 2 months ago
• benreynwar / fpga-sdrlib
  Verilog modules for software-defined radio.
  ☆18Updated 12 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆34Updated 6 months ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated last year
• analogdevicesinc / testbenches
  Testbenches for HDL projects
  ☆20Updated this week
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• linuxbest / ahci_mpi
  an sata controller using smallest resource.
  ☆16Updated 11 years ago
• oscimp / fpga_ip
  OscillatorIMP ecosystem FPGA IP sources
  ☆28Updated 2 months ago
• gtortone / libaxidma
  C++ library for AXI DMA with direct and scatter-gather support
  ☆11Updated 3 years ago
• os-fpga / IP_Catalog
  IP Catalog for Raptor.
  ☆14Updated 9 months ago
• tgingold / OpenTDC
  Time to Digital Converter (TDC)
  ☆35Updated 4 years ago
• hukenovs / blackman_harris_win
  Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CO…
  ☆12Updated 5 years ago
• BerkeleyLab / Marble-Mini
  "Marble-Mini" Simple FMC carrier board with SFP, 2x FMC, PoE
  ☆19Updated 3 years ago
• EEVengers / libtslitex
  This is a C library to interface with the LiteX Firmware on Thunderscope over PCIe
  ☆11Updated last week
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆30Updated 2 years ago
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆16Updated 2 years ago
• lewiz-support / LMAC_CORE1
  LMAC Core1 - Ethernet 1G/100M/10M
  ☆18Updated 2 years ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆13Updated 7 years ago
• esynr3z / adc-eval
  📊 Tools collection (NumPy + Matplotlib based) to do spectral analysis and calculate the key performance parameters of an ADC
  ☆21Updated 2 years ago
• tmeissner / cryptocores
  cryptography ip-cores in vhdl / verilog
  ☆41Updated 4 years ago
• hukenovs / adc_configurator
  ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
  ☆13Updated 7 years ago
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆24Updated 7 years ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• ymz000 / Kintex-7-xc7k325-pcb
  基于Kintex-7 XC7K325T的高性能FPGA功能验证板
  ☆19Updated 5 years ago
• noasic / noasic
  An open-source VHDL library for FPGA design.
  ☆31Updated 3 years ago