hukenovs / math
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
☆27Updated 4 years ago
Alternatives and similar repositories for math:
Users that are interested in math are comparing it to the libraries listed below
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆30Updated 7 years ago
- Audio Signal Processing SoC☆18Updated 7 years ago
- VHDL Library for implementing common DSP functionality.☆27Updated 6 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆59Updated 9 months ago
- A simple and crude CIC filter implementation in Python3 for learning purposes☆21Updated 5 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆55Updated 2 years ago
- VHDL Modules☆24Updated 10 years ago
- OscillatorIMP ecosystem FPGA IP sources☆27Updated 3 weeks ago
- Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"☆26Updated 3 years ago
- JESD204b modules in VHDL☆29Updated 6 years ago
- Single Port RAM, Dual Port RAM, FIFO☆23Updated 2 years ago
- DPLL for phase-locking to 1PPS signal☆31Updated 8 years ago
- FIR implemention with Verilog☆47Updated 5 years ago
- Hardware description (VHDL) and configuration scripts (Python) of a versatile IIR Filter implemented as cascaded SOS/biquads. No vendor-s…☆19Updated 6 years ago
- My code repositry for common use.☆22Updated 3 years ago
- This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals☆22Updated last year
- JESD204B core for Migen/MiSoC☆36Updated 3 years ago
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆83Updated 2 years ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆14Updated 4 years ago
- Verilog modules for software-defined radio.☆18Updated 12 years ago
- ☆15Updated 9 months ago
- Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).☆58Updated 2 years ago
- FIR,FFT based on Verilog☆13Updated 7 years ago
- FPGA-based Fully Digital FM Transmitter using SDR (Software-Defined Radio) techniquies as up-converter using hpsdm, comb filters, cordic …☆12Updated 4 years ago
- FPGA version of CORDIC algorithm that evaluates all the trigonometric and anti-trigonometric functions.☆22Updated 5 years ago
- A collection of Opal Kelly provided design resources☆16Updated last month
- FMCW Radar verilog project☆32Updated 4 years ago
- Verilog IP Cores & Tests☆13Updated 6 years ago
- 软件无线电,使用FPGA进行正交解调。☆20Updated 6 years ago
- A collection of demonstration digital filters☆148Updated last year