Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
☆34Aug 14, 2020Updated 6 years ago
Alternatives and similar repositories for math
Users that are interested in math are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Octave/MATLAB code for generating compensation FIR coefficients☆14Sep 7, 2015Updated 11 years ago
- Audio filtering with pyfda and cocotb☆13Sep 24, 2020Updated 6 years ago
- Low Frequency and Weak Signal Underwater Communications in GNU Radio.☆15Jun 27, 2020Updated 6 years ago
- Plots ADS-B Data from Dump1090 in your Terminal☆12Mar 23, 2022Updated 4 years ago
- 在嵌入式软件开发当中，常常第一步就是设计整个系统的架构。有基于OS的，也有裸机的。我们先拿裸机说事儿，我想很多人在做单片机的裸机开发（甚至基于OS）时脑海里根本没有设计架构的想法，从来都是while（1）循环到底，能写点状态机已经算是基础扎实的人物了。那么问题来了，whil…☆12Nov 25, 2019Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Polyphonic additive wheeltone synthesizer core☆19Oct 23, 2019Updated 7 years ago
- FIR filter implementation☆29Mar 19, 2020Updated 6 years ago
- My webpage:☆15Sep 13, 2026Updated last month
- Modulate and Demodulate QPSK☆13Aug 8, 2016Updated 10 years ago
- See YouTube Video: https://youtu.be/5smhhTKb3DM☆13Feb 21, 2021Updated 5 years ago
- A collection of digital signal processing projects.☆55Apr 2, 2018Updated 8 years ago
- VHDL Library for implementing common DSP functionality.☆33Oct 5, 2018Updated 8 years ago
- MIDI synthesizer written in VHDL☆13Apr 3, 2012Updated 14 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆33May 6, 2017Updated 9 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Unterlagen zu den Vorlesungen "Digitale Signalverarbeitung (DSV)" und "DSV auf FPGAs"☆32Jun 14, 2024Updated 2 years ago
- Solving Sudokus using open source formal verification tools☆18Aug 16, 2022Updated 4 years ago
- Audio Signal Processing SoC☆20Mar 13, 2018Updated 8 years ago
- FPGA纯逻辑实现modbus通信☆27Sep 5, 2022Updated 4 years ago
- FPGA-based FFT audio spectrum analyzer☆23Nov 19, 2017Updated 8 years ago
- Cascaded Integrator Comb(CIC) filter implemented in C++☆22Apr 18, 2018Updated 8 years ago
- Hide a target image in an audio file with some BASIC digital signal processing techniques!!! (DSP Final Project)☆22Sep 25, 2020Updated 6 years ago
- Python Digital signal processing (DSP) modules☆20Nov 6, 2020Updated 5 years ago
- Slow Radar Target Detection in Heterogeneous Clutter using Thinned Space-Time Adaptive Processing☆22Nov 19, 2015Updated 10 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Curated, validated harness primitives for GitHub Copilot and Claude Code: agents, skills, prompts, hooks, plugins, MCP integrations, cata…☆21Sep 18, 2026Updated last month
- Public repository of the data, scripts and methodology presented in the paper "Towards On-Board SAR Processing with FPGA Accelerators and…☆14Apr 12, 2023Updated 3 years ago
- Client Driver for this HDL module: https://github.com/analogdevicesinc/hdl/tree/master/library/axi_dmac☆17Mar 10, 2022Updated 4 years ago
- Sample code for basic realtime audio applications with SDL2☆22Oct 13, 2023Updated 3 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆22Nov 21, 2017Updated 8 years ago
- Hardware Design: 16 channel analog control voltage shield for teensy 4.1; 8ch in / 8ch out; +-10V @ 16bits/sample;☆27Nov 8, 2021Updated 4 years ago
- original project for thermostat & hygrostat to made egg incubator☆10Aug 5, 2020Updated 6 years ago
- Low-powered tone emitter and detector☆14Jun 13, 2016Updated 10 years ago
- In this project, I am developing an I2C interface (IIC, TWI) for the FPGA platform. In this project I use the Verilog HDL digital hardwar…☆21Apr 9, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.☆14Jan 27, 2016Updated 10 years ago
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆99Jan 31, 2023Updated 3 years ago
- ☆11May 17, 2016Updated 10 years ago
- Building your own SDR DDC/DUC transceiver with DIY modules from aliexpress☆34Nov 11, 2019Updated 6 years ago
- Lightweight image viewer (recovered copy)☆16Feb 23, 2026Updated 8 months ago
- ⚙️ 基于 Zynq-7 全可编程 SoC 的设计☆41Dec 31, 2021Updated 4 years ago
- FFT utility for pdplot data files, optionally use Chirp Z Transform for zooming and Welch's method for smoothing☆10Nov 22, 2019Updated 6 years ago