The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the FPGA can be monitored in a waveform.
☆65Nov 14, 2025Updated 7 months ago
Alternatives and similar repositories for gatemate_ila
Users that are interested in gatemate_ila are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simple extension boards for Olimex GateMate FPGA Board☆20Jun 30, 2025Updated last year
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆44Mar 24, 2026Updated 3 months ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆45Jun 16, 2026Updated 3 weeks ago
- Project Peppercorn GateMate Test Cases☆17Feb 25, 2026Updated 4 months ago
- CologneChip GateMate FPGA Module: GMM-7550☆36Jan 17, 2026Updated 5 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆98May 8, 2026Updated 2 months ago
- ULX5M with GateMate with SDRAM☆60Mar 13, 2026Updated 3 months ago
- Episode I - RISCV CPU implementation tutorial for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆17Apr 7, 2026Updated 3 months ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- IP Catalog for Raptor.☆18Dec 6, 2024Updated last year
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated 11 months ago
- Re-coded Gowin GW1N primitives for Verilator use☆24Aug 19, 2022Updated 3 years ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆19Nov 16, 2023Updated 2 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated 11 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆36Feb 23, 2025Updated last year
- ☆12Jun 4, 2021Updated 5 years ago
- Portable HyperRAM controller☆69Dec 8, 2024Updated last year
- User-friendly explanation of Yosys options☆113Sep 25, 2021Updated 4 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆72Jan 30, 2026Updated 5 months ago
- LunaPnR is a place and router for integrated circuits☆48Feb 11, 2026Updated 4 months ago
- Drop In USB CDC ACM core for iCE40 FPGA☆36Sep 5, 2021Updated 4 years ago
- Blinking Led Project☆10Aug 29, 2023Updated 2 years ago
- Nitro USB FPGA core☆88Mar 1, 2026Updated 4 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Apache NuttX RTOS on FPGA☆16Feb 20, 2024Updated 2 years ago
- sigrok_slogic☆21Apr 15, 2025Updated last year
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆87May 8, 2026Updated 2 months ago
- WCH CH569 SerDes Reverse Engineering☆30Aug 13, 2022Updated 3 years ago
- An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:☆17Feb 29, 2024Updated 2 years ago
- Tcl examples repository designed primarily for use with the latest version of the Libero® SoC Design Suite.☆11Jul 18, 2024Updated last year
- Hardware Description Language Translator☆19Jun 9, 2026Updated last month
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- Yet Another VHDL tool☆30May 15, 2017Updated 9 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Demonstration of the YoWASP toolchain being used with Visual Studio Code to program a Radiona ULX3S board☆11Jan 1, 2024Updated 2 years ago
- Kuchen Computer☆23Jun 26, 2024Updated 2 years ago
- A Risc-V SoC for Tiny Tapeout☆54Updated this week
- Python classes to create agnostic wave files for HDL simulator viewer☆13Jul 1, 2026Updated last week
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- Zynq PR Management☆13Apr 20, 2016Updated 10 years ago
- ☆73Aug 19, 2024Updated last year