Project Peppercorn GateMate Test Cases
☆16Feb 25, 2026Updated 2 months ago
Alternatives and similar repositories for prjpeppercorn-test-cases
Users that are interested in prjpeppercorn-test-cases are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simple extension boards for Olimex GateMate FPGA Board☆20Jun 30, 2025Updated 10 months ago
- ULX5M with GateMate with SDRAM☆56Mar 13, 2026Updated 2 months ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆41May 9, 2026Updated last week
- Re-coded Gowin GW1N primitives for Verilator use☆23Aug 19, 2022Updated 3 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆31Jan 17, 2026Updated 4 months ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆64Nov 14, 2025Updated 6 months ago
- LiteX Accelerator Block for GNU Radio☆24Feb 6, 2022Updated 4 years ago
- Apache NuttX RTOS on FPGA☆15Feb 20, 2024Updated 2 years ago
- LunaPnR is a place and router for integrated circuits☆47Feb 11, 2026Updated 3 months ago
- ☆12Jun 4, 2021Updated 4 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆97May 8, 2026Updated last week
- Portable HyperRAM controller☆66Dec 8, 2024Updated last year
- Ruby Hardware Description Language☆15Mar 13, 2013Updated 13 years ago
- Waveform Generator☆12Jul 18, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆33Oct 15, 2024Updated last year
- Files and documentation for Pico-Dirty-Blaster Workshop☆20Jun 21, 2025Updated 10 months ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆32Sep 1, 2022Updated 3 years ago
- ☆22Feb 3, 2026Updated 3 months ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆39Jan 11, 2026Updated 4 months ago
- A Vivado IP package of the PicoRV32 RISC-V processor☆15Jul 9, 2020Updated 5 years ago
- ☆22Mar 5, 2022Updated 4 years ago
- Schoko Computer☆11Jun 7, 2023Updated 2 years ago
- A bit-serial CPU☆20Sep 29, 2019Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Demo projects for various Kintex FPGA boards☆68Feb 28, 2026Updated 2 months ago
- ☆18Jul 9, 2025Updated 10 months ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆42Mar 24, 2026Updated last month
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- USB Full-Speed core written in migen/LiteX☆12Sep 19, 2019Updated 6 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆71Jan 30, 2026Updated 3 months ago
- Notes on/tools for/new firmware for (?) a PDC002 USB PD cable☆17Apr 8, 2021Updated 5 years ago
- Demonstration of the YoWASP toolchain being used with Visual Studio Code to program a Radiona ULX3S board☆11Jan 1, 2024Updated 2 years ago
- Simulation VCD waveform viewer, using old Motif UI☆28Apr 8, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- SPI flash MITM and emulation (QSPI is a WIP)☆20Jan 27, 2022Updated 4 years ago
- A configurable SRAM generator☆62Updated this week
- Tiny RISC-V machine code monitor written in RISC-V assembly.☆63Updated this week
- Device description files (architecture, timing, configuration bitstream, and general documentation) for EOS S3 MCU+eFPGA SoC☆27Sep 1, 2021Updated 4 years ago
- Framework ExpansionFPGA acceleration module☆33Jun 4, 2025Updated 11 months ago
- Yosys plugin for logic locking and supply-chain security☆24Apr 5, 2025Updated last year
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆37Feb 23, 2025Updated last year