ulixxe / usb_cdcLinks
Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
☆187Updated last year
Alternatives and similar repositories for usb_cdc
Users that are interested in usb_cdc are comparing it to the libraries listed below
Sorting:
- ☆117Updated 3 years ago
- USB Serial on the TinyFPGA BX☆141Updated 4 years ago
- VHDL library 4 FPGAs☆185Updated this week
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆112Updated last year
- CoreScore☆172Updated 2 months ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆92Updated 7 months ago
- Nitro USB FPGA core☆86Updated last year
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆97Updated 5 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆88Updated 3 months ago
- USB3 PIPE interface for Xilinx 7-Series☆244Updated last month
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆88Updated this week
- Example LED blinking project for your FPGA dev board of choice☆189Updated 2 weeks ago
- FuseSoC standard core library☆151Updated 2 months ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆93Updated 7 years ago
- Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs☆124Updated 4 years ago
- Basic USB-CDC device core (Verilog)☆86Updated 4 years ago
- Experimental flows using nextpnr for Xilinx devices☆253Updated last year
- A full-speed device-side USB peripheral core written in Verilog.☆236Updated 3 years ago
- Demo projects for various Kintex FPGA boards☆65Updated 8 months ago
- A wishbone controlled scope for FPGA's☆87Updated 2 years ago
- Naive Educational RISC V processor☆94Updated 3 months ago
- assorted library of utility cores for amaranth HDL☆102Updated last year
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆110Updated this week
- This repository contains small example designs that can be used with the open source icestorm flow.☆155Updated 4 years ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆80Updated last week
- Experimental flows using nextpnr for Xilinx devices☆56Updated 2 months ago
- Verilog wishbone components☆124Updated 2 years ago
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆354Updated 3 months ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆147Updated 2 years ago