Alternatives and similar repositories for clear

Users that are interested in clear are comparing it to the libraries listed below

• colognechip / gatemate_ila
  The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …
  ☆57Updated last week
• mole99 / greyhound-ihp
  Greyhound on IHP SG13G2 0.13 μm BiCMOS process
  ☆64Updated 2 months ago
• meiniKi / FazyRV
  A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
  ☆108Updated 2 months ago
• openXC7 / nextpnr-xilinx
  Experimental flows using nextpnr for Xilinx devices
  ☆51Updated 5 months ago
• chili-chips-ba / openCologne
  Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…
  ☆80Updated last month
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆91Updated 7 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆81Updated 5 years ago
• openXC7 / toolchain-installer
  Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7
  ☆92Updated 4 months ago
• TheMightyDuckOfDoom / liberty74
  A Fully Open-Source Verilog-to-PCB Flow
  ☆24Updated last year
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆112Updated 4 years ago
• openXC7 / demo-projects
  Demo projects for various Kintex FPGA boards
  ☆64Updated 6 months ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆96Updated 5 years ago
• MichaelBell / tinyQV
  A Risc-V SoC for Tiny Tapeout
  ☆43Updated last week
• MJoergen / HyperRAM
  Portable HyperRAM controller
  ☆60Updated 11 months ago
• efabless / caravel_board
  ☆38Updated last year
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆97Updated last year
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆43Updated 9 months ago
• FPGA-Research / byteman
  Bitstream relocation and manipulation tool.
  ☆49Updated 2 years ago
• ulixxe / usb_cdc
  Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
  ☆185Updated last year
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆97Updated last year
• regymm / pcie_7x
  PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers
  ☆62Updated 6 months ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆85Updated last year
• mattvenn / vga-clock
  Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
  ☆62Updated 4 years ago
• chili-chips-ba / openXC7-TetriSaraj
  Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…
  ☆33Updated 8 months ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆39Updated 3 years ago
• epsilon537 / boxlambda
  FPGA based microcomputer sandbox for software and RTL experimentation
  ☆72Updated 2 weeks ago
• FelipeFFerreira / ITA-CORES
  RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
  ☆54Updated 2 years ago
• antonblanchard / vlsiffra
  Create fast and efficient standard cell based adders, multipliers and multiply-adders.
  ☆119Updated 2 years ago
• smunaut / iCE40linux
  Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker
  ☆101Updated 2 years ago
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆26Updated last month