GMM-7550 / gmm7550-hardware
CologneChip GateMate FPGA Module: GMM-7550
☆18Updated 7 months ago
Related projects: ⓘ
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆47Updated 2 weeks ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆18Updated 6 months ago
- Demo projects for various Kintex FPGA boards☆43Updated 3 months ago
- KiCad Library to make it easy to create both host boards and expansion boards and which are compatible with the Digilent "PMOD" specifica…☆36Updated 3 years ago
- snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support☆26Updated 2 months ago
- Drop In USB CDC ACM core for iCE40 FPGA☆33Updated 3 years ago
- ☆42Updated last year
- ULPI Link Wrapper (USB Phy Interface)☆21Updated 4 years ago
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆23Updated 7 months ago
- IceCore Ice40 HX based modular core☆44Updated 3 years ago
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆26Updated last year
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆19Updated 4 years ago
- Example Verilog code for Ulx3s☆38Updated 2 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆57Updated 7 months ago
- CRUVI Standard Specifications☆17Updated 4 months ago
- PMOD boards for ULX3S☆39Updated last year
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆58Updated 5 years ago
- sample VCD files☆36Updated 7 months ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆19Updated 10 months ago
- 🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).☆21Updated 2 years ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆16Updated 10 months ago
- Use ECP5 JTAG port to interact with user design☆24Updated 3 years ago
- ☆23Updated 11 months ago
- Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples. https://www.chil…☆37Updated this week
- Wishbone interconnect utilities☆34Updated 3 months ago
- Set up your GitHub Actions workflow with a OSS CAD Suite☆14Updated 5 months ago
- Nix flake for openXC7☆24Updated last week
- A configurable USB 2.0 device core☆30Updated 4 years ago
- Example designs for the Spartan7 "S7 Mini" FPGA board☆27Updated 5 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆17Updated 2 years ago