ArcaneNibble / yavhdl
Yet Another VHDL tool
☆31Updated 7 years ago
Alternatives and similar repositories for yavhdl:
Users that are interested in yavhdl are comparing it to the libraries listed below
- Experiments with Yosys cxxrtl backend☆47Updated last month
- A Verilog Synthesis Regression Test☆35Updated 11 months ago
- ☆59Updated last year
- Open Processor Architecture☆26Updated 8 years ago
- Project X-Ray Database: XC7 Series☆65Updated 3 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated last year
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated this week
- Verilog FPGA Parts Library. Old Octavo soft-CPU project.☆72Updated 5 years ago
- Yosys Plugins☆21Updated 5 years ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 3 years ago
- 妖刀夢渡☆59Updated 5 years ago
- Tools and Examples for IcoBoard☆79Updated 3 years ago
- PicoRV☆44Updated 5 years ago
- Using VexRiscv without installing Scala☆37Updated 3 years ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆40Updated 9 months ago
- A bit-serial CPU☆18Updated 5 years ago
- chipy hdl☆17Updated 6 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- ☆22Updated last year
- User-friendly explanation of Yosys options☆112Updated 3 years ago
- Documenting Lattice's 28nm FPGA parts☆142Updated last year
- LatticeMico32 soft processor☆104Updated 10 years ago
- Reusable Verilog 2005 components for FPGA designs☆40Updated last year
- Small footprint and configurable Inter-Chip communication cores☆55Updated last month
- lightweight open HLS for FPGA rapid prototyping☆20Updated 6 years ago
- Featherweight RISC-V implementation☆52Updated 3 years ago
- RISC-V Processor written in Amaranth HDL☆36Updated 3 years ago
- mantle library☆42Updated 2 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆42Updated 10 months ago
- Small footprint and configurable HyperBus core☆11Updated 2 years ago