plctlab / llvm-projectLinks
PLCT实验室的 RISC-V V Spec 实现,基于llvm/llvm-project,rkruppe/rvv-llvm 和 https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi-0.8
☆161Updated this week
Alternatives and similar repositories for llvm-project
Users that are interested in llvm-project are comparing it to the libraries listed below
Sorting:
- 平头哥玄铁C910的LLVM工具链支持,由PLCT实验室提供,非官方版本☆73Updated 4 years ago
- ☆288Updated this week
- This is a tutorial to learn LLVM, I realize a backend to compiler machine code for cpu0 which is a simple RISC cpu.☆251Updated 3 years ago
- RiVEC Bencmark Suite☆120Updated 8 months ago
- 第一届 RISC-V 中国峰会的幻灯片等资料存放☆38Updated 2 years ago
- Full Support 32bit RISC-V in LLVM and CLANG for Vector Extension☆43Updated 4 years ago
- ☆168Updated 4 years ago
- 通过issue和README来记录日常学习研究笔记 关注 机器学习系统,深度学习, LLVM,性能剖视, Linux操作系统内核 话题 关注 C/C++. JAVA. Python. Golang. Chisel. 编程语言话题 ( Writing Blogs using …☆77Updated 5 years ago
- ☆343Updated this week
- Training Materials for RISC-V HW/SW, focusing on compilers, emulators, and virtual machines. provided by PLCT Lab.☆33Updated last year
- 《从零开始的RISC-V模拟器开发》配套的PPT和教学资料☆223Updated 3 years ago
- A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation☆191Updated last year
- RISC-V模拟器,相关硬件实现`riscv-isa-sim`以及模拟 器pk, bbl的指导手册☆53Updated 5 years ago
- XiangShan Frontend Develop Environment☆64Updated this week
- 💻 RISC-V Simulator of RV32I ISA. 5-stage pipeline / out-of-order execution with Tomasulo algorithm and Speculation. Support runtime visu…☆203Updated 5 years ago
- This is a repo for recording and reporting RISCV platform's test and measurement continuously.☆59Updated last year
- CPU micro benchmarks☆61Updated 2 months ago
- A matrix extension proposal for AI applications under RISC-V architecture☆151Updated 6 months ago
- 由HelloLLVM社区主席邱吉博士发起,联合HelloGCC等技术社区,推出了「南盘江计划」,致力于帮助更多的女性工程师在编译等基础软件领域实现个人职业目标。☆37Updated last month
- ☆63Updated 2 years ago
- ☆97Updated this week
- LLVM OpenCL C compiler suite for ventus GPGPU☆51Updated 3 weeks ago
- A translator from c to MLIR☆28Updated 3 years ago
- ☆380Updated last week
- A translation project of the RISC-V reader☆175Updated last year
- ☆75Updated 9 months ago
- Yet another toy CPU.☆92Updated last year
- Repository containing the guide and code for booting RISC-V full system linux using gem5.☆53Updated 4 years ago
- Modern co-simulation framework for RISC-V CPUs☆148Updated this week
- Run rocket-chip on FPGA☆70Updated 9 months ago