tomverbeure / fpga_quick_ram_update

Related projects: ⓘ

• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆12Updated 5 years ago
• VHDPlus / VHDPlus_Libraries_and_Examples
  This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…
  ☆18Updated 6 months ago
• tomverbeure / intel_jtag_primitive_blog
  How to use the Intel JTAG primitive without using virtual JTAG
  ☆16Updated 2 years ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆24Updated 3 years ago
• tmeissner / gatemate_experiments
  Experiments with Cologne Chip's GateMate FPGA architecture
  ☆16Updated 10 months ago
• tomverbeure / jtag_uart_example
  Mini CPU design with JTAG UART support
  ☆18Updated 3 years ago
• jevinskie / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆12Updated last year
• tongchen126 / fpga_pcie_ethernet
  ☆14Updated 2 years ago
• mattvenn / logLUTs
  Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.
  ☆19Updated 10 months ago
• mattvenn / crap-o-scope
  crap-o-scope scope implementation for icestick
  ☆20Updated 6 years ago
• no2fpga / no2muacm
  Drop In USB CDC ACM core for iCE40 FPGA
  ☆33Updated 3 years ago
• rob-ng15 / PAWS
  PLEASE MOVE TO PAWSv2
  ☆17Updated 2 years ago
• dan-rodrigues / ics-adpcm
  Programmable multichannel ADPCM decoder for FPGA
  ☆23Updated 3 years ago
• lawrie / ulx3s_retro
  Retro computing on the Ulx3s ECP5 FPGA board
  ☆23Updated 2 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆38Updated 2 years ago
• machdyne / musli
  Müsli USB Pmod-compatible module
  ☆11Updated last year
• lawrie / ulx3s_bit_streams
  Bit streams forthe Ulx3s ECP5 device
  ☆16Updated last year
• hansfbaier / colorlight-qmtech-adapter
  Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor
  ☆17Updated 2 years ago
• nockieboy / gpu
  Collaborative project to create an advanced GPU, with additional features to flesh-out the peripherals for a home-made, DIY computer.
  ☆15Updated last year
• micro-FPGA / CRUVI
  CRUVI Standard Specifications
  ☆17Updated 4 months ago
• kazkojima / lunauac2-pdm
  A LiteX module implementing a USB UAC2 module with simple PDM in/out
  ☆14Updated 2 years ago
• lawrie / blackicemxbook
  ☆25Updated 4 years ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆13Updated 4 years ago
• chili-chips-ba / openXC7-TetriSaraj
  Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…
  ☆18Updated 6 months ago
• splinedrive / my_sdram
  simple sdram controller
  ☆17Updated 3 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆13Updated 3 years ago
• alpin3 / ulx3s
  Everything needed for ulx3s FPGA
  ☆13Updated 3 years ago
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆25Updated 4 years ago
• mattvenn / fpga-sram
  mystorm sram test
  ☆26Updated 7 years ago
• antmicro / arty-expansion-board
  IO expansion board compatible with Digilent Arty A7
  ☆9Updated last year