Alternatives and similar repositories for msr-uncore-cbo

Users that are interested in msr-uncore-cbo are comparing it to the libraries listed below

• jdmccalpin / SKX-SF-Conflicts
  Repeated access to L2-containable loops to look for snoop filter conflicts on Intel Skylake Xeon processors.
  ☆29Updated 6 years ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆20Updated 4 years ago
• CPU-THU / Spectre-V4-ng
  The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…
  ☆22Updated last year
• FxPiGaAo / Hacky-Racer
  ☆17Updated 2 weeks ago
• gururaj-s / mirage
  MIRAGE (USENIX Security 2021)
  ☆13Updated last year
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆60Updated 5 years ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆17Updated 4 years ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆27Updated 2 years ago
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆25Updated 2 weeks ago
• flowyroll / uarchsec
  ☆45Updated 6 years ago
• vusec / tlbdr
  ☆18Updated 2 years ago
• aliireza / slice-aware
  Slice-aware Memory Management - Exploiting NUCA Characteristic of LLC in Intel Processors
  ☆42Updated 6 years ago
• yshalabi / covert-channel-tutorial
  Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…
  ☆48Updated 6 years ago
• zzrcxb / PinnedLoads
  Gem5 implementation of Pinned Loads: Taming Speculative Loads in Secure Processors
  ☆9Updated 2 years ago
• CSL-KU / SpectreGuard
  Data-centric defense mechanism against Spectre attacks. (DAC'19)
  ☆11Updated 5 years ago
• renxida / iseedeaduops-poc
  Proof-of-concept for I See Dead Micro-Ops transient execution attack
  ☆14Updated 3 years ago
• aakahlow / gem5Valid_Haswell
  ☆20Updated 5 years ago
• tongzhou80 / Intel-TSX-test-suite
  A suite of simple programs to test Intels' TSX extension
  ☆13Updated 8 years ago
• cgvwzq / cachequery
  HW interface for memory caches
  ☆28Updated 5 years ago
• SJTU-IPADS / PipeLLM
  ☆19Updated 6 months ago
• efeslab / moesi-prime
  ☆15Updated 2 years ago
• WukLab / Pythia
  Pythia is a set of RDMA-based remote side-channel attacks. USENIX Security 2019.
  ☆28Updated 4 years ago
• pierreay / reproduce-spectre-gem5
  Repository of the paper "Reproducing Spectre Attack with gem5, How To Do It Right?"
  ☆17Updated last year
• dskarlatos / ElasticCuckooHashing
  (elastic) cuckoo hashing
  ☆14Updated 5 years ago
• vusec / xlate
  Code to evaluate XLATE attacks as well existing cache attacks.
  ☆31Updated 6 years ago
• TheNetAdmin / NVLeak
  NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems [USENIX Security '23]
  ☆18Updated 2 years ago
• TheNetAdmin / LENS-VANS
  Characterizing and Modeling Non-Volatile Memory Systems [MICRO'20, TopPicks'21]
  ☆33Updated 3 years ago
• cwfletcher / stt
  ☆35Updated 4 years ago
• libtea / frameworks
  Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser
  ☆61Updated 2 years ago
• dskarlatos / MicroScope
  Microscope: Enabling Microarchitectural Replay Attacks
  ☆19Updated 5 years ago