abs-tudelft / Tydi-Chisel

Related projects ⓘ

Alternatives and complementary repositories for Tydi-Chisel

• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 2 years ago
• rameloni / tywaves-chisel
  A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code…
  ☆23Updated 3 weeks ago
• TsaiAnson / verif
  ☆11Updated 3 years ago
• Kuree / hgdb
  Hardware generator debugger
  ☆71Updated 9 months ago
• tdb-alcorn / chisel-formal
  ☆23Updated 3 years ago
• chipsalliance / diplomacy
  ☆16Updated 4 months ago
• ekiwi / wellen
  wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.
  ☆41Updated last week
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆25Updated last week
• uenoku / firtool-standalone-plugin
  an experiment to run plugin in firtool pipeline
  ☆9Updated last year
• chipsalliance / systemc-compiler
  Intel Compiler for SystemC
  ☆23Updated last year
• fredrequin / verilator_xilinx
  Re-coded Xilinx primitives for Verilator use
  ☆41Updated 8 months ago
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆31Updated last year
• chick / visualizer
  Provides dot visualizations of chisel/firrtl circuites
  ☆11Updated 5 years ago
• Lampro-Mellon / Quasar
  Quasar 2.0: Chisel equivalent of SweRV-EL2
  ☆28Updated 3 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆31Updated 7 months ago
• YosysHQ / eqy
  Equivalence checking with Yosys
  ☆31Updated 2 weeks ago
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆67Updated 6 months ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆55Updated 2 weeks ago
• ucb-bar / shuttle
  A Rocket-based RISC-V superscalar in-order core
  ☆28Updated 3 weeks ago
• rahulk29 / sram22
  A configurable SRAM generator
  ☆40Updated this week
• sequencer / arithmetic
  ☆31Updated last month
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆43Updated 4 months ago
• carlosedp / chisel-playground
  Chisel HDL example applications
  ☆30Updated 2 years ago
• esa-tu-darmstadt / SCAIE-V
  An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:
  ☆12Updated 8 months ago
• pulp-platform / morty
  A SystemVerilog source file pickler.
  ☆51Updated last month
• chipsalliance / firrtl-spec
  The specification for the FIRRTL language
  ☆46Updated this week
• easysoc / layered-firrtl
  This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl
  ☆11Updated 3 years ago
• chipsalliance / OmnixtendEndpoint
  Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.
  ☆15Updated 6 months ago
• povik / yosys-slang
  slang-based frontend for Yosys
  ☆43Updated this week
• mikeurbach / egg-netlist-synthesizer
  Using e-graphs to synthesize netlists from boolean logic.
  ☆14Updated last year