Alternatives and similar repositories for colibri

Users that are interested in colibri are comparing it to the libraries listed below

• eine / hwd-ide
  ☆20Updated 5 years ago
• ghdl / ghdl-cosim
  Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL
  ☆49Updated this week
• VHDL / Compliance-Tests
  Tests to evaluate the support of VHDL 2008 and VHDL 2019 features
  ☆31Updated 7 months ago
• hdl / symbolator
  Generate symbols from HDL components/modules
  ☆21Updated 2 years ago
• Paebbels / JSON-for-VHDL
  A JSON library implemented in VHDL.
  ☆79Updated 2 years ago
• Nic30 / d3-wave
  D3.js based wave (signal) visualizer
  ☆63Updated 2 weeks ago
• tdene / synth_opt_adders
  Prefix tree adder space exploration library
  ☆57Updated 9 months ago
• fossi-foundation / wishbone
  Specification of the Wishbone SoC Interconnect Architecture
  ☆45Updated 3 years ago
• OSVVM / OsvvmLibraries
  Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
  ☆64Updated 3 weeks ago
• wavedrom / zoom
  🔍 Zoomable Waveform viewer for the Web
  ☆43Updated 4 years ago
• tmeissner / psl_with_ghdl
  Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
  ☆66Updated 7 months ago
• drom / sta
  🕒 Static Timing Analysis diagram renderer
  ☆13Updated last year
• wavedrom / vcd-samples
  sample VCD files
  ☆37Updated last month
• olofk / subservient
  Small SERV-based SoC primarily for OpenMPW tapeout
  ☆46Updated 2 months ago
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆61Updated last year
• pieter3d / simview
  ☆79Updated this week
• drom / logidrom
  Digital Circuit rendering engine
  ☆39Updated last month
• Toroid-io / vcd2wavedrom
  Python script to transform a VCD file to wavedrom format
  ☆78Updated 3 years ago
• VHDL / news
  VHDL related news.
  ☆25Updated this week
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆73Updated 2 weeks ago
• kevinpt / hdlparse
  Simple parser for extracting VHDL documentation
  ☆71Updated last year
• hdl / constraints
  Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards
  ☆45Updated last week
• antonblanchard / vlsiffra
  Create fast and efficient standard cell based adders, multipliers and multiply-adders.
  ☆117Updated last year
• tmeissner / formal_hw_verification
  Trying to verify Verilog/VHDL designs with formal methods and tools
  ☆42Updated last year
• ics-jku / wal
  WAL enables programmable waveform analysis.
  ☆155Updated 2 months ago
• davidthings / hdelk
  Web-based HDL diagramming tool
  ☆79Updated 2 years ago
• YosysHQ / mcy
  Mutation Cover with Yosys (MCY)
  ☆86Updated 3 weeks ago
• phanrahan / mantle
  mantle library
  ☆44Updated 2 years ago
• lnis-uofu / SOFA
  SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA
  ☆141Updated 2 years ago
• nobodywasishere / VHDLproc
  VHDLproc is a VHDL preprocessor
  ☆24Updated 3 years ago