Sphinx extension for visual documentation of hardware written in HWT
β12Nov 12, 2025Updated 5 months ago
Alternatives and similar repositories for sphinx-hwt
Users that are interested in sphinx-hwt are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- D3.js and ELK based schematic visualizerβ118Feb 27, 2024Updated 2 years ago
- π elastic circuit toolchainβ33Dec 2, 2024Updated last year
- D3.js based wave (signal) visualizerβ68Aug 19, 2025Updated 7 months ago
- hardware library for hwt (= ipcore repo)β44Dec 23, 2025Updated 3 months ago
- π Static Timing Analysis diagram rendererβ13Dec 13, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways β’ AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A reconfigurable logic circuit made of identical rotatable tiles.β26Nov 15, 2021Updated 4 years ago
- β20May 5, 2020Updated 5 years ago
- A Tcl-Library for scripted HDL generationβ17Apr 30, 2024Updated last year
- Open deep learning compiler stack for cpu, gpu and specialized acceleratorsβ17Sep 26, 2019Updated 6 years ago
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI workβ¦β10Jan 13, 2022Updated 4 years ago
- Streaming based VHDL parser.β85Jul 15, 2024Updated last year
- Python library for operations with VCD and other digital wave filesβ55Nov 12, 2025Updated 5 months ago
- β17Apr 20, 2023Updated 2 years ago
- Language server based on ghdlβ103May 14, 2025Updated 11 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI β’ AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Python library for parsing module definitions and instantiations from SystemVerilog filesβ27Apr 29, 2021Updated 4 years ago
- WaveDrom compatible python command lineβ115Jun 2, 2023Updated 2 years ago
- datasheet generatorβ30Jul 18, 2025Updated 8 months ago
- Example Projects for the Microsemi SmartFusion 2β11Dec 10, 2017Updated 8 years ago
- β37Sep 19, 2024Updated last year
- netlistDB - Intermediate format for digital hardware representation with graph database APIβ31Mar 17, 2021Updated 5 years ago
- Log file scanner used with EDA tools to classify errors and warningsβ12Nov 14, 2022Updated 3 years ago
- Web-based HDL diagramming toolβ83May 1, 2023Updated 2 years ago
- Digital Circuit rendering engineβ39Mar 31, 2026Updated 2 weeks ago
- Managed hosting for WordPress and PHP on Cloudways β’ AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Limited python / cocotb interface to Xilinx/AMD Vivado simulator.β75Feb 18, 2026Updated last month
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Liβ¦β26Apr 5, 2026Updated last week
- A Verilog Filelist parser in Rustβ11Mar 25, 2022Updated 4 years ago
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++β223Dec 23, 2025Updated 3 months ago
- Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.β26Mar 1, 2021Updated 5 years ago
- β11Apr 25, 2020Updated 5 years ago
- Convert tag files (ctags, gccxml, etc) to databases (sqlite, mysql, etc)β13Mar 30, 2015Updated 11 years ago
- verilog_instance.vim: create instantiation of ports from port declarationβ31Mar 13, 2023Updated 3 years ago
- HDL symbol generatorβ201Feb 2, 2023Updated 3 years ago
- Serverless GPU API endpoints on Runpod - Bonus Credits β’ AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Php class for Majority Judgmentβ17Nov 11, 2021Updated 4 years ago
- HW Design: A Functional Approachβ145Jun 26, 2023Updated 2 years ago
- π LLM inference optimization simulator, modeling compute-bound prefill and memory-bound decode phases.β14Jul 12, 2025Updated 9 months ago
- Sphinx Extension which generates various types of diagrams from Verilog code.β65Sep 25, 2023Updated 2 years ago
- Solving Sudokus using open source formal verification toolsβ18Aug 16, 2022Updated 3 years ago
- VHDL grammar for tree-sitterβ32Dec 20, 2023Updated 2 years ago
- Create WaveJSON from VCD file. WaveDrom can convert it to timing diagram.β41Jul 24, 2024Updated last year