wavedrom / zoomLinks
🔍 Zoomable Waveform viewer for the Web
☆43Updated 5 years ago
Alternatives and similar repositories for zoom
Users that are interested in zoom are comparing it to the libraries listed below
Sorting:
- Specification of the Wishbone SoC Interconnect Architecture☆49Updated 3 years ago
- Digital Circuit rendering engine☆39Updated 5 months ago
- Web-based HDL diagramming tool☆82Updated 2 years ago
- sample VCD files☆40Updated last month
- VHDLproc is a VHDL preprocessor☆24Updated 3 years ago
- Scripts to build and use docker images including GHDL☆43Updated last year
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆51Updated last week
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆46Updated last week
- A JSON library implemented in VHDL.☆81Updated last month
- Trying to verify Verilog/VHDL designs with formal methods and tools☆42Updated last year
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆32Updated 3 years ago
- VHDL String Formatting Library☆26Updated last year
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Updated 11 months ago
- CLI for WaveDrom☆64Updated last year
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆53Updated 2 years ago
- Generate symbols from HDL components/modules☆22Updated 2 years ago
- FuseSoc Verification Automation☆22Updated 3 years ago
- D3.js based wave (signal) visualizer☆67Updated 5 months ago
- Streaming based VHDL parser.☆85Updated last year
- VHDL related news.☆27Updated this week
- Python script to transform a VCD file to wavedrom format☆84Updated 3 years ago
- An abstract language model of VHDL written in Python.☆60Updated last week
- ☆88Updated 3 months ago
- Virtual development board for HDL design☆42Updated 2 years ago
- ☆20Updated 5 years ago
- Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)☆66Updated 11 months ago
- A simple function to add wavedrom diagrams into an ipython notebook.☆24Updated 4 years ago
- 🕒 Static Timing Analysis diagram renderer☆13Updated 2 years ago
- A padring generator for ASICs☆25Updated 2 years ago
- A curated list of awesome VHDL IP cores, frameworks, libraries, software and resources.☆83Updated 5 years ago