Alternatives and similar repositories for iimc:

Users that are interested in iimc are comparing it to the libraries listed below

• CoriolisSP / FuzzBtor2
  Random Generator of Btor2 Files
  ☆10Updated last year
• lijwen2748 / simplecar
  ☆15Updated 2 years ago
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆25Updated last year
• jix / kissat_extras
  A fork of the Kissat SAT solver with additional features. Supports incremental solving.
  ☆14Updated 2 years ago
• gipsyh / rIC3-HWMCC24
  rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission
  ☆11Updated 7 months ago
• Gy-Hu / HWMCC24-benchmark
  Collection for submission (Hardware Model Checking Benchmark)
  ☆9Updated 5 months ago
• ycunxi / ACEC_benchmarks
  Arithmetic multiplier benchmarks
  ☆11Updated 7 years ago
• jetafese / btor2mlir
  Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification
  ☆13Updated 4 months ago
• d-kfmnn / amulet2
  AMulet 2. - A better AIG Multiplier Examination Tool
  ☆24Updated 2 years ago
• amahzoon / genmul
  ☆16Updated 4 years ago
• hwmcc / btor2tools
  A generic parser and tool package for the BTOR2 format.
  ☆41Updated 4 months ago
• chc-comp / chc-tools
  Tools for manipulating CHC and related files
  ☆14Updated last year
• fangwenji / tacas23-wasim
  ☆12Updated 2 years ago
• Ekdohibs / PolyGen
  PolyGen is a code generator for the polyhedral model, written and proved in Coq.
  ☆10Updated 4 years ago
• Gy-Hu / E-Syn
  E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)
  ☆28Updated 9 months ago
• amahzoon / RevSCA-2.0
  ☆10Updated 5 years ago
• iscas-tis / CHA
  ☆18Updated 9 months ago
• mit-plv / hemiola
  A Coq framework to support structural design and proof of hardware cache-coherence protocols
  ☆13Updated 2 years ago
• upscale-project / generic-sqed-demo
  ☆13Updated 4 years ago
• makaimann / ride-core-demo
  A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core
  ☆12Updated 5 years ago
• gussmith23 / lakeroad
  FPGA synthesis tool powered by program synthesis
  ☆41Updated this week
• gipsyh / rIC3
  Hardware Formal Verification Tool
  ☆44Updated last week
• mikeurbach / egg-netlist-synthesizer
  Using e-graphs to synthesize netlists from boolean logic.
  ☆14Updated last year
• yihozhang / relational-ematching-benchmark
  ☆16Updated 3 years ago
• TeamVoss / VossII
  The source code to the Voss II Hardware Verification Suite
  ☆56Updated this week
• Moorvan / RISCV-Formal-Chisel
  RISC-V Formal in Chisel
  ☆11Updated last year
• stanford-centaur / pono
  Pono: A flexible and extensible SMT-based model checker
  ☆99Updated this week
• IntelLabs / pycaliper
  PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…
  ☆20Updated 3 months ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆71Updated 4 years ago
• whaaswijk / percy
  An advanced header-only exact synthesis library
  ☆25Updated 2 years ago