SI-RISCV / hbird-e-sdkLinks
Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/
☆111Updated 4 years ago
Alternatives and similar repositories for hbird-e-sdk
Users that are interested in hbird-e-sdk are comparing it to the libraries listed below
Sorting:
- OpenSource HummingBird RISC-V Software Development Kit☆158Updated last year
- OpenXuantie - OpenE902 Core☆152Updated last year
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆72Updated 4 years ago
- OpenXuantie - OpenE906 Core☆139Updated last year
- ☆142Updated 4 years ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆107Updated 2 years ago
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 5 years ago
- LicheeTang 蜂鸟E203 Core☆196Updated 6 years ago
- Cortex M0 based SoC☆73Updated 3 years ago
- ☆87Updated 4 months ago
- Light-weight RISC-V RV32IMC microcontroller core.☆104Updated 8 years ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆217Updated 4 years ago
- Silicon-validated SoC implementation of the PicoSoc/PicoRV32☆271Updated 4 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆138Updated last year
- lists of most popular repositories for most favoured programming languages (according to StackOverflow)☆81Updated 4 years ago
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆129Updated 5 years ago
- The Ultra-Low Power RISC Core☆15Updated 5 years ago
- riscv资料、论文等☆143Updated 6 years ago
- commit rtl and build cosim env☆35Updated last year
- AMBA bus generator including AXI, AHB, and APB☆105Updated 3 years ago
- RISC-V SystemC-TLM simulator☆311Updated 6 months ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆208Updated last year
- AHB3-Lite Interconnect☆89Updated last year
- UVM实战随书源码☆52Updated 6 years ago
- a 4-pipeline riscv soc ( included core, periph), based with rv32im ,designed by verilog☆23Updated last year
- ☆63Updated 4 years ago
- Nuclei Board Labs☆60Updated last year
- ☆67Updated 9 years ago
- 视频旋转(2019FPGA大赛)☆34Updated 5 years ago
- ☆71Updated 3 years ago