Alternatives and similar repositories for kamikaze:

Users that are interested in kamikaze are comparing it to the libraries listed below

• SI-RISCV / hbird-e-sdk
  Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/
  ☆112Updated 3 years ago
• PulseRain / Reindeer
  PulseRain Reindeer - RISCV RV32I[M] Soft CPU
  ☆126Updated 5 years ago
• XUANTIE-RV / opene902
  OpenXuantie - OpenE902 Core
  ☆138Updated 7 months ago
• Lichee-Pi / Tang_E203_Mini
  LicheeTang 蜂鸟E203 Core
  ☆190Updated 5 years ago
• XUANTIE-RV / opene906
  OpenXuantie - OpenE906 Core
  ☆137Updated 7 months ago
• risclite / SuperScalar-RISCV-CPU
  SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
  ☆205Updated 4 years ago
• riscv-mcu / hbird-sdk
  OpenSource HummingBird RISC-V Software Development Kit
  ☆151Updated last year
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆68Updated 3 years ago
• flyjancy / CortexM0_SoC
  Cortex M0 based SoC
  ☆72Updated 3 years ago
• NXP / i3c-slave-design
  MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
  ☆121Updated 4 years ago
• jijingg / Spinal-bootcamp
  SpinalHDL-tutorial based on Jupyter Notebook
  ☆130Updated 8 months ago
• ilg-archived / riscv-none-gcc
  The GNU MCU Eclipse RISC-V Embedded GCC
  ☆76Updated 5 years ago
• microdynamics-cpu / tree-core-ide
  The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…
  ☆102Updated 2 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆78Updated 5 years ago
• xupsh / ZynqBook
  基于Xilinx Zynq 嵌入式软硬件协同设计实战指南
  ☆83Updated 9 years ago
• ic7x24 / verilog-mini-demo
  Verilog极简教程
  ☆35Updated 5 years ago
• yaozhaosh / e200_opensource
  The Ultra-Low Power RISC Core
  ☆15Updated 4 years ago
• lizhirui / AXI-SDCard-High-Speed-Controller
  A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)
  ☆113Updated 2 years ago
• ljgibbslf / SM3_core
  ☆139Updated 4 years ago
• pulp-platform / pulp-riscv-gnu-toolchain
  ☆76Updated last month
• RoaLogic / ahb3lite_interconnect
  AHB3-Lite Interconnect
  ☆84Updated 9 months ago
• maswx / vu13p
  国产VU13P加速卡资料
  ☆61Updated 3 weeks ago
• openrisc / or1200
  OpenRISC 1200 implementation
  ☆164Updated 9 years ago
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆68Updated 8 months ago
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆264Updated 4 years ago
• cnrv / CNRV-FPU
  Basic floating-point components for RISC-V processors
  ☆64Updated 5 years ago
• nucleisys / n200-doc
  Deprecated, no longer updated, please change to https://www.nucleisys.com/index.php
  ☆25Updated 3 years ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆112Updated 5 years ago
• LiHao217 / RISC-V_article_paper_src
  riscv资料、论文等
  ☆141Updated 6 years ago
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆119Updated 2 years ago