Light-weight RISC-V RV32IMC microcontroller core.
☆104Mar 4, 2017Updated 9 years ago
Alternatives and similar repositories for kamikaze
Users that are interested in kamikaze are comparing it to the libraries listed below
Sorting:
- uRV RISC-V core☆19Sep 29, 2015Updated 10 years ago
- A small 32-bit implementation of the RISC-V architecture☆32Jul 17, 2020Updated 5 years ago
- Helper scripts used to clone RISC-V related git repos inside China.☆16Sep 17, 2020Updated 5 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Feb 24, 2023Updated 3 years ago
- A simple RISC-V core, described with Verilog☆27Jun 1, 2013Updated 12 years ago
- A Verilog AMBA AHB Multilayer interconnect generator☆12Aug 8, 2017Updated 8 years ago
- RISC CPU by Icenowy☆12Dec 26, 2018Updated 7 years ago
- A RISC-V processor☆15Dec 11, 2018Updated 7 years ago
- turbo 8051☆30Aug 30, 2017Updated 8 years ago
- ☆14Oct 19, 2019Updated 6 years ago
- 为推广RISC-V尽些薄力☆312Jun 22, 2023Updated 2 years ago
- ☆19Nov 17, 2017Updated 8 years ago
- The program for USB-Blaster Chinese version on STM32 works with☆33Sep 7, 2017Updated 8 years ago
- A 32-bit Microcontroller featuring a RISC-V core☆160Feb 28, 2018Updated 8 years ago
- Binary blob for Anlogic USB-JTAG adapter (temporary), We should figure out much better solution next year.☆18Sep 11, 2018Updated 7 years ago
- ☆11Jan 9, 2021Updated 5 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆95Jan 14, 2026Updated last month
- Generic AHB master stub☆12Jul 17, 2014Updated 11 years ago
- AGM bitstream utilities and decoded files from Supra☆48Aug 9, 2025Updated 6 months ago
- ☆27Dec 15, 2021Updated 4 years ago
- symmetric clock tree synthesis for NTV IC design☆11May 8, 2022Updated 3 years ago
- Translate the source code of Veriog version to Spinalhdl version☆10Jul 1, 2021Updated 4 years ago
- ☆13Feb 13, 2021Updated 5 years ago
- ☆13Jul 26, 2021Updated 4 years ago
- Python script for controlling the debug-jtag port of riscv cores☆15Mar 27, 2021Updated 4 years ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆34Dec 11, 2016Updated 9 years ago
- Simple mono FM Radio.☆51Jun 24, 2016Updated 9 years ago
- A programming language for FPGAs.☆20May 5, 2018Updated 7 years ago
- Untethered (stand-alone) FPGA implementation of the lowRISC SoC☆55Oct 2, 2019Updated 6 years ago
- Firmware for the FX2 which emulates the FTDI serial chips (including MPSSE support).☆17Aug 7, 2018Updated 7 years ago
- ☆10Sep 1, 2020Updated 5 years ago
- SpinalHDL components for Corundum Ethernet☆15Aug 16, 2023Updated 2 years ago
- USB-Blaster instance on CH55x MCU.☆57Jul 8, 2019Updated 6 years ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,493Jan 7, 2026Updated last month
- Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/☆115Mar 24, 2021Updated 4 years ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,986Jun 27, 2024Updated last year
- A extremely size-optimized RV32I soft processor for FPGA.☆27Jun 19, 2018Updated 7 years ago
- move to https://github.com/RT-Thread-packages/micropython☆18Jan 26, 2019Updated 7 years ago
- P4FPGA is located at github.com/hanw/p4fpga☆13Jan 27, 2017Updated 9 years ago