nucleisys / n200-docLinks
Deprecated, no longer updated, please change to https://www.nucleisys.com/index.php
☆25Updated 4 years ago
Alternatives and similar repositories for n200-doc
Users that are interested in n200-doc are comparing it to the libraries listed below
Sorting:
- A 32-bit RISC-V SoC on FPGA that supports RT-Thread.☆28Updated last year
- Reindeer Soft CPU for Step CYC10 FPGA board☆27Updated 4 years ago
- turbo 8051☆29Updated 7 years ago
- The GNU MCU Eclipse RISC-V Embedded GCC☆79Updated 5 years ago
- PulseRain Rattlesnake - RISCV RV32IMC Soft CPU☆34Updated 5 years ago
- The directory to save Bumblebee core's documents, just for GD32VF103 RISC-V Core☆42Updated 4 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆92Updated 3 years ago
- Simple mono FM Radio.☆48Updated 9 years ago
- Light-weight RISC-V RV32IMC microcontroller core.☆104Updated 8 years ago
- The directory to save GD32VF103 Demo_Suites☆33Updated 4 years ago
- ☆14Updated 5 years ago
- Communication channel from FPGA (Alterra EP4CE10) and Linux (Lichee PI Allwinner V3S)☆29Updated 5 years ago
- 8051 core☆107Updated 10 years ago
- Nuclei RISC-V Software Development Kit☆143Updated this week
- FPGA CryptoNight V7 Minner☆30Updated 5 years ago
- The directory to save GD32VF103 DataSheets☆19Updated 4 years ago
- Deprecated, please use https://github.com/Nuclei-Software/nuclei-sdk☆21Updated 4 years ago
- USB 2.0 Device IP Core☆68Updated 7 years ago
- ☆25Updated 3 years ago
- USB Full Speed PHY☆45Updated 5 years ago
- Ethernet MAC 10/100 Mbps☆83Updated 5 years ago
- SPI-Flash XIP Interface (Verilog)☆39Updated 3 years ago
- DEPRECATED: Please update to risc-none-elf-gcc-xpack☆124Updated 2 years ago
- SEA-S7_gesture recognition☆16Updated 4 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆72Updated last year
- LicheeTang FPGA Examples☆122Updated 5 years ago
- SDIO Device Verilog Core☆22Updated 6 years ago
- Yet another free 8051 FPGA core☆35Updated 6 years ago
- An open source FPGA design for DSLogic☆156Updated 11 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆33Updated 5 years ago