Elements Software Development Kit
☆13Jan 8, 2026Updated 9 months ago
Alternatives and similar repositories for elements-sdk
Users that are interested in elements-sdk are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 8 and 9 bit SAR ADC in IHP SG13G2☆11Mar 19, 2025Updated last year
- Fork of github.com/UCSBarchlab/OpenTPU for the TGPTPU project☆14Jun 1, 2025Updated last year
- End-to-End Open-Source I2C GPIO Expander☆45Sep 24, 2026Updated last month
- ☆42Oct 16, 2026Updated 2 weeks ago
- SpinalHDL USB system for the ULPI based Arrow DECA board☆21Jan 9, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A fast, open-source DRC (Design Rule Check) engine for GDSII layouts.☆62Updated this week
- LunaPnR is a place and router for integrated circuits☆47Feb 11, 2026Updated 8 months ago
- A tapeout-ready structure for hierarchical analog design (v0.1).☆26Jan 16, 2026Updated 9 months ago
- Interchange formats for chip design.☆40Feb 15, 2026Updated 8 months ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated 2 years ago
- A Rust VCD parser intended to be the backend of a Waveform Viewer(built using egui) that supports dynamically loaded rust plugins.☆51Dec 30, 2024Updated last year
- OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/☆13Jan 26, 2026Updated 9 months ago
- Open-source, RISC-V-based Hardware Security Module☆12Oct 31, 2024Updated 2 years ago
- My Master Thesis at the ASL supervised by Hermann Blum, Francesco Milano and Dr. Cadena Cesar☆11Dec 20, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Full Speed USB DFU interface for FPGA and ASIC designs☆21Mar 10, 2024Updated 2 years ago
- ☆14Updated this week
- ☆12Jun 13, 2021Updated 5 years ago
- Hardware Description Library☆96Feb 17, 2026Updated 8 months ago
- PlotJugger plugin for LSL Stream.☆12Jul 5, 2022Updated 4 years ago
- Integrated Circuit Layout☆63Feb 25, 2025Updated last year
- xspcomm encapsulates the DPI-based digital circuit and provides various high-level language operation interfaces.☆10Oct 24, 2026Updated last week
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆31Oct 13, 2026Updated 2 weeks ago
- Core for S-Cart ecommerce☆14Oct 2, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- IP submodules, formatted for easier CI integration☆31Sep 22, 2025Updated last year
- A Verilog implementation of Multi-bit-throughput LFSR with an detailed document about LFSRs for HW design engineers☆10Jan 2, 2026Updated 9 months ago
- ☆10May 11, 2021Updated 5 years ago
- ☆14Jan 21, 2026Updated 9 months ago
- ☆16Sep 17, 2026Updated last month
- This project contains Verilog designs and a PCB for the implementation of CSI-2 camera interface to HDMI bridge on a Gatemate FPGA from C…☆21Jul 28, 2025Updated last year
- Amaranth HDL libary for building USB-capable SoC designs.☆31Oct 31, 2025Updated last year
- This repo contains the scripts that are used to model and optimize an optical receiver.☆12Jun 4, 2024Updated 2 years ago
- A type-safe, formally verifiable HDL compiler in Lean 4. Inspired by Clash, built for high-assurance hardware synthesis.☆164Oct 20, 2026Updated last week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆15Oct 25, 2026Updated last week
- Set up your GitHub Actions workflow with a OSS CAD Suite☆18Mar 19, 2026Updated 7 months ago
- A certified RISC-V Interpreter with Hoare-logic in Lean☆23Aug 11, 2026Updated 2 months ago
- PACOSYT: a Machine Learning based PAssive COmponent SYthesis Tool☆13Feb 1, 2023Updated 3 years ago
- VexRiscv reference platforms for the pqriscv project☆16Mar 9, 2024Updated 2 years ago
- Generate a website from markdown with a minimum of fuss.☆13Nov 15, 2025Updated 11 months ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain☆95Mar 12, 2026Updated 7 months ago