ascend-secure-processor / oramLinks
Hardware implementation of ORAM
☆24Updated 8 years ago
Alternatives and similar repositories for oram
Users that are interested in oram are comparing it to the libraries listed below
Sorting:
- FPGA related files for ORAM☆14Updated 10 years ago
- [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4☆37Updated 5 years ago
- CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.☆36Updated last year
- Defense/Attack PUF Library (DA PUF Library)☆55Updated 5 years ago
- Recursive unified ORAM☆15Updated 10 years ago
- FIPS 202 compliant SHA-3 core in Verilog☆23Updated 5 years ago
- Repo for code developed during the HEAT project (Homomorphic Encryption Applications Technology)☆65Updated 5 years ago
- Integer Multiplier Generator for Verilog☆23Updated 7 months ago
- SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. T…☆143Updated 2 years ago
- A fault-injection framework using Chisel and FIRRTL☆36Updated 4 months ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆28Updated 7 months ago
- CocoAlma is an execution-aware tool for formal verification of masked implementations☆24Updated last year
- A list of VHDL codes implementing cryptographic algorithms☆27Updated 4 years ago
- ILA Model Database☆24Updated 5 years ago
- FPGA implementation of a physical unclonable function for authentication☆33Updated 8 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated last year
- XCrypto: a cryptographic ISE for RISC-V☆92Updated 3 years ago
- Heterogeneous simulator for DECADES Project☆32Updated last year
- Code repository for Coppelia tool☆23Updated 5 years ago
- DASS HLS Compiler☆29Updated 2 years ago
- Cryptanalysis of Physically Unclonable Functions☆91Updated last year
- FPGA-based stochastic gradient descent (powered by ZipML - Low-precision machine learning on reconfigurable hardware)☆33Updated 5 years ago
- Chisel module for performing Multi-Scalar Multiplication☆13Updated 3 years ago
- ☆82Updated last year
- A Modeling and Verification Platform for SoCs using ILAs☆81Updated last year
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆29Updated 3 years ago
- Circuit Synthesis for Yao's Garbled Circuit by TinyGarble☆11Updated 5 years ago
- ☆14Updated 3 years ago
- A Coherent Multiprocessor Cache Simulator Based on the SuperESCalar Cache Model☆28Updated 12 years ago
- HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)☆17Updated last year