Alternatives and similar repositories for netfpga

Users that are interested in netfpga are comparing it to the libraries listed below

• NetFPGA / NetFPGA-public
  NetFPGA public repository
  ☆182Updated 5 years ago
• NetFPGA / NetFPGA-SUME-public
  NetFPGA-SUME public repository
  ☆112Updated 10 years ago
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆200Updated last year
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆275Updated 10 months ago
• ucb-bar / fpga-zynq
  Support for Rocket Chip on Zynq FPGAs
  ☆412Updated 6 years ago
• cambridgehackers / connectal
  Connectal is a framework for software-driven hardware development.
  ☆176Updated 2 years ago
• openrisc / mor1kx
  mor1kx - an OpenRISC 1000 processor IP core
  ☆561Updated 2 months ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆133Updated 4 years ago
• Xilinx / XilinxTclStore
  Xilinx Tcl Store
  ☆368Updated this week
• openrisc / or1200
  OpenRISC 1200 implementation
  ☆173Updated 10 years ago
• yol / ethernet_mac
  Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL
  ☆175Updated last year
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆89Updated 6 months ago
• Xilinx / open-nic
  AMD OpenNIC Project Overview
  ☆288Updated 2 years ago
• fpgasystems / fpga-network-stack
  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
  ☆870Updated 4 months ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆132Updated 10 months ago
• lastweek / fpga_readings
  Recipe for FPGA cooking
  ☆306Updated last year
• f32c / f32c
  A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz
  ☆412Updated last week
• lowRISC / lowrisc-chip
  The root repo for lowRISC project and FPGA demos.
  ☆600Updated 2 years ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆223Updated last year
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆54Updated 2 years ago
• westerndigitalcorporation / swerv_eh1
  A directory of Western Digital’s RISC-V SweRV Cores
  ☆872Updated 5 years ago
• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆50Updated 9 years ago
• grg / parser-gen
  Network packet parser generator
  ☆53Updated 5 years ago
• tymonx / logic
  CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
  ☆283Updated 5 years ago
• VLSI-EDA / PoC
  The PoC Library has been forked to github.com/VHDL/PoC. See new address below
  ☆595Updated 3 months ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆182Updated 2 months ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆603Updated 7 months ago
• cambridgehackers / fpgamake
  Generates Makefiles to synthesize, place, and route verilog using Vivado
  ☆97Updated 3 years ago
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆60Updated 6 months ago
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆277Updated 5 years ago