johan92 / fpga-hash-table

Related projects ⓘ

Alternatives and complementary repositories for fpga-hash-table

• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆102Updated 2 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆58Updated 2 weeks ago
• alexforencich / cocotbext-eth
  Ethernet interface modules for Cocotb
  ☆56Updated last year
• sach / System-Verilog-Packet-Library
  System-Veilog Packet Library to configure, randomize, pack/unpack, copy, compare/display different headers
  ☆70Updated 5 years ago
• oprecomp / DDR4_controller
  ☆47Updated 3 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆40Updated last year
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆41Updated 3 years ago
• shuckc / verilog-utils
  native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches
  ☆41Updated 9 years ago
• mcjtag / tcam
  TCAM (Ternary Content-Addressable Memory) in Verilog
  ☆42Updated last year
• mcjtag / eth_switch
  Verilog Ethernet Switch (layer 2)
  ☆35Updated last year
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆44Updated 10 years ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆139Updated 11 months ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆67Updated 10 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆54Updated 4 years ago
• dpretet / cdc
  Repository gathering basic modules for CDC purpose
  ☆50Updated 4 years ago
• optimsoc / optimsoc
  OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores
  ☆80Updated 3 years ago
• thomasrussellmurphy / stx_cookbook
  Altera Advanced Synthesis Cookbook 11.0
  ☆93Updated last year
• buttercutter / DDR
  A simple DDR3 memory controller
  ☆51Updated last year
• amiq-consulting / amiq_eth
  Library defining all Ethernet packets in SystemVerilog and in SystemC
  ☆34Updated 8 years ago
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆78Updated 2 years ago
• taneroksuz / fpu
  IEEE 754 single and double precision floating point library in systemverilog and vhdl
  ☆58Updated last month
• intel / aib-phy-hardware
  ☆66Updated last year
• AmeerAbdelhadi / Indirectly-Indexed-2D-Ternary-Content-Addressable-Memory-TCAM
  Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)
  ☆22Updated last week
• OSVVM / AXI4
  AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream t…
  ☆129Updated 2 weeks ago
• amonemi / ProNoC
  Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
  ☆48Updated 5 months ago
• bmartini / verilog-arbiter
  A look ahead, round-robing parametrized arbiter written in Verilog.
  ☆40Updated 4 years ago
• aquaxis / gemac
  Gigabit MAC + UDP/TCP/IP offload Engine
  ☆31Updated 5 years ago
• luinaudt / deparser
  ☆16Updated 2 years ago
• cnrv / CNRV-FPU
  Basic floating-point components for RISC-V processors
  ☆64Updated 4 years ago
• forconesi / nfmac10g
  Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
  ☆61Updated 7 years ago