actlab-genesys / GeneSys
An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
☆48Updated this week
Alternatives and similar repositories for GeneSys:
Users that are interested in GeneSys are comparing it to the libraries listed below
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆48Updated 3 weeks ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆77Updated 7 months ago
- MICRO22 artifact evaluation for Sparseloop☆42Updated 2 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆46Updated 5 months ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆37Updated 2 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆69Updated 3 years ago
- RTL implementation of Flex-DPE.☆98Updated 5 years ago
- A co-design architecture on sparse attention☆50Updated 3 years ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆48Updated 3 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆62Updated this week
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆68Updated 5 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆48Updated last week
- ☆22Updated 4 months ago
- ☆47Updated 3 weeks ago
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆29Updated 7 months ago
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆36Updated last year
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆86Updated 5 months ago
- ☆23Updated 7 months ago
- ☆43Updated 3 years ago
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆25Updated last year
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 5 months ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆94Updated last month
- FRAME: Fast Roofline Analytical Modeling and Estimation☆34Updated last year
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆55Updated 3 years ago
- HISIM introduces a suite of analytical models at the system level to speed up performance prediction for AI models, covering logic-on-log…☆32Updated this week
- [FPGA 2024]FPGA Accelerator for Imbalanced SpMV using HLS☆10Updated last month
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- A bit-level sparsity-awared multiply-accumulate process element.☆14Updated 8 months ago
- An Open-Source Tool for CGRA Accelerators☆58Updated 2 months ago
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆24Updated last year