wdxm657 / cpp_practise
☆13Updated last year
Alternatives and similar repositories for cpp_practise:
Users that are interested in cpp_practise are comparing it to the libraries listed below
- ☆32Updated last year
- 2023集创赛紫光同创杯一等奖项目☆105Updated last year
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆160Updated 5 months ago
- 2024年全国大学生嵌入式芯片与系统设计竞赛 FPGA创新设计赛道 国一+易灵思创新杯获奖作品 Ultra-Vision (基于Ti60F225的无极缩放算法实现)☆55Updated 2 weeks ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆92Updated last year
- 2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件☆32Updated 2 years ago
- 帧差法运动目标检测,基于ZYNQ7020☆62Updated 3 years ago
- FPGA project☆215Updated 2 years ago
- ☆219Updated last year
- FPGA实现简单的图像处理算法☆41Updated 2 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆140Updated last year
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆55Updated 11 months ago
- The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…☆32Updated 9 months ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆77Updated 3 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆316Updated last year
- 本工程使用纯verilog编写rtl代码,在FPGA上搭建神经网络LeNet-5,实现手写数字识别的功能。☆13Updated 4 months ago
- FPGA图像处理仿真平台☆26Updated 2 years ago
- The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…☆34Updated 11 months ago
- 该作品为2024年FPGA创新设计大赛(上海安路科技赛道)国一作品☆19Updated 2 months ago
- FPGA☆152Updated 9 months ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆46Updated 4 years ago
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆70Updated this week
- 基于FPGA进行车牌识别☆72Updated last year
- FPGA实现动态图像识别☆19Updated 4 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆73Updated 2 years ago
- Implementation of Canny Edge Detection on Cyclone IV. To run project you need Quartus and ModelSim.☆12Updated 5 years ago
- Constrast limited adaptive histogram equlization based on Verilog☆31Updated last year
- FPGA☆122Updated 5 years ago
- HLS_YOLOV3☆25Updated last year
- 基于FPGA和ov5640的实时图像采集及灰度转换系统☆12Updated last year