eda-lab / CNNAF-CNN-AcceleratorLinks
CNN-Accelerator based on FPGA developed by verilog HDL.
☆10Updated 3 years ago
Alternatives and similar repositories for CNNAF-CNN-Accelerator
Users that are interested in CNNAF-CNN-Accelerator are comparing it to the libraries listed below
Sorting:
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Updated 2 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- A CNN accelerator design inspired by MIT Eyeriss project☆17Updated 4 years ago
- A Fix-pointed Rudimentary CNN Convolution Accelerator☆16Updated 4 years ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆40Updated last year
- Hardware accelerator for convolutional neural networks☆53Updated 3 years ago
- tpu-systolic-array-weight-stationary☆25Updated 4 years ago
- A systolic array matrix multiplier☆25Updated 6 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆12Updated 4 years ago
- DMA controller for CNN accelerator☆14Updated 8 years ago
- Systolic array based simple TPU for CNN on PYNQ-Z2☆35Updated 3 years ago
- ☆10Updated 9 months ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- Efficient FPGA-Based Accelerator for Convolutional Neural Networks☆24Updated last year
- 2020 xilinx summer school☆17Updated 5 years ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆16Updated 4 years ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆14Updated 6 years ago
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆20Updated 2 years ago
- EE 272B - VLSI Design Project☆13Updated 4 years ago
- ☆26Updated 2 years ago
- ☆66Updated 6 years ago
- Sparse CNN Accelerator targeting Intel FPGA☆12Updated 4 years ago
- ☆27Updated 5 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆26Updated 3 years ago
- ☆28Updated 5 months ago
- HLS implemented systolic array structure☆41Updated 7 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆13Updated 2 years ago