zhaijw18 / mcpat-calib-publicLinks
A RISC-V BOOM Microarchitecture Power Modeling Framework
☆29Updated 2 years ago
Alternatives and similar repositories for mcpat-calib-public
Users that are interested in mcpat-calib-public are comparing it to the libraries listed below
Sorting:
- An Open-Source Tool for CGRA Accelerators☆72Updated this week
- The open-sourced version of BOOM-Explorer☆43Updated 2 years ago
- An integrated CGRA design framework☆90Updated 5 months ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆69Updated last year
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆136Updated 2 months ago
- RTL implementation of Flex-DPE.☆110Updated 5 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆63Updated 3 weeks ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆16Updated last year
- A list of our chiplet simulaters☆38Updated 2 months ago
- ☆42Updated 3 months ago
- ☆58Updated 5 months ago
- An Open-Source Tool for CGRA Accelerators☆24Updated this week
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆155Updated this week
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆157Updated 3 weeks ago
- gem5 repository to study chiplet-based systems☆81Updated 6 years ago
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆158Updated 2 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆90Updated 4 months ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆63Updated 6 months ago
- A toolchain for rapid design space exploration of chiplet architectures☆59Updated last month
- ☆43Updated last month
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆58Updated 2 months ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆33Updated last month
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆80Updated 3 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆138Updated 3 months ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆246Updated 2 years ago
- Template-based Reconfigurable Architecture Modeling Framework☆14Updated 3 years ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆72Updated 6 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated 11 months ago
- ☆31Updated 10 months ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆223Updated 2 years ago