Alternatives and similar repositories for Image-super-resolution-FPGA

Users that are interested in Image-super-resolution-FPGA are comparing it to the libraries listed below

• AILearnerLi / DAC-SDC-2020-SEUer
  ☆26Updated 3 years ago
• jgoeders / dac_sdc_2021_designs
  ☆20Updated 3 years ago
• vivian13maker / The-advanced-work-of-Object-detection-based-on-FPGAs
  ☆33Updated 4 years ago
• AiArtisan / dac_sdc_2022_champion
  ☆21Updated 3 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 5 years ago
• jgoeders / dac_sdc_2022_designs
  ☆17Updated 3 years ago
• heymesut / SJTU_microe
  A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC
  ☆28Updated 3 years ago
• ChrisZonghaoLi / cnn_conv_accelerator
  A Fix-pointed Rudimentary CNN Convolution Accelerator
  ☆16Updated 5 years ago
• Jiawei888 / FPGA-CNN-Accelerator
  The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…
  ☆11Updated 5 years ago
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆28Updated 4 years ago
• nimish15shah / DPU_DAG_Processing_Unit
  RTL code for the DPU chip designed for irregular graphs
  ☆13Updated 3 years ago
• LukiBa / zybo_yolo
  YOLO example implementation using Intuitus CNN accelerator on ZYBO ZYNQ-7000 FPGA board
  ☆21Updated 4 years ago
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆155Updated last year
• ZhangYuQAQ / Hardware-Acceleration-Circuit-Design-of-Object-Detection-Network-Based-on-FPGA
  2020 xilinx summer school
  ☆19Updated 5 years ago
• 0x5b25 / CNN_Core
  A CNN accelerator design inspired by MIT Eyeriss project
  ☆20Updated 4 years ago
• adki / DeepLearningOnFpga-202006
  Lecture Material on Deep Learning Inference using FPGA
  ☆12Updated 5 years ago
• haroonrl / DNN_HLS_Accelerator
  This repository contains source code for CNN layers of ALexNet using Xilinx HLS Vivado.
  ☆10Updated 3 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆47Updated last year
• jgoeders / dac_sdc_2021
  ☆23Updated 4 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆54Updated 4 years ago
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆115Updated 4 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago
• xlsjdjdk / Ship-Detection-based-on-YOLOv3-and-KV260
  This is the entry project of the Xilinx Adaptive Computing Challenge 2021. It uses YOLOv3 for ship target detection in optical remote sen…
  ☆17Updated 3 years ago
• fffasttime / AnyPackingNet
  ☆31Updated 8 months ago
• qing-2 / PYNQ-YOLOv2
  可运行
  ☆39Updated 3 years ago
• markcxli / FPGA_DPU
  This project is to implement YOLO v3 on Xilinx FPGA with DPU
  ☆64Updated 5 years ago
• xbdxwyh / yolov3_fpga_project
  ☆56Updated 2 years ago
• dimdano / gan-hls
  Accelerated Image Reconstruction using Generative Adversarial Networks on Cloud FPGAs
  ☆11Updated 4 years ago
• SivannaKing / SEU-ASIC-IOT-ECGAI
  Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators
  ☆16Updated 2 years ago
• yayouz / CNN-accelerator
  DMA controller for CNN accelerator
  ☆14Updated 8 years ago