isabekov / fireprog

Related projects: ⓘ

• ultraembedded / core_usb_sniffer
  USB capture IP
  ☆18Updated 4 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆24Updated 2 years ago
• ultraembedded / riscv_sbc
  A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
  ☆26Updated 4 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆22Updated 2 years ago
• pablomarx / rodinia
  AGM bitstream utilities and decoded files from Supra
  ☆39Updated 5 months ago
• gtjennings1 / UPDuino-LH154Q01-Display
  Design to connect Lattice Ultraplus FPGA to LH154Q01 Display
  ☆27Updated 6 years ago
• ADA007 / FTDI_User_Area_Writer
  FTDI EEPROM User Area Writer For Xilinx JTAG Programmer
  ☆11Updated 10 years ago
• hansfbaier / colorlight-qmtech-adapter
  Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor
  ☆17Updated 2 years ago
• hydrausb3 / wch-ch569-serdes
  WCH CH569 SerDes Reverse Engineering
  ☆25Updated 2 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆38Updated 4 years ago
• freecores / ps2
  PS2 interface
  ☆17Updated 6 years ago
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆51Updated last year
• regymm / ymmcu-ft2232
  FT2232HL JTAG & UART Downloader
  ☆14Updated 3 years ago
• mattvenn / understanding-tinyfpga-bootloader
  understanding the tinyfpga bootloader
  ☆24Updated 6 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆58Updated 5 years ago
• j-marjanovic / ocs-tray-mezzanine-adapter
  PCIe adapter for an FPGA accelerator for Open CloudServer
  ☆20Updated 4 years ago
• kholia / xvc-esp8266
  ESP8266 powered Xilinx Virtual Cable - Xilinx WiFi JTAG!
  ☆22Updated 3 years ago
• freecores / wb_builder
  WISHBONE Builder
  ☆13Updated 8 years ago
• AnlogicInfo / anlogic-picorv32
  ☆20Updated this week
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆21Updated 4 years ago
• esynr3z / usb20dev
  USB 2.0 FS Device controller IP core written in SystemVerilog
  ☆32Updated 5 years ago
• mithro / fx2-ftdi-emulation
  Firmware for the FX2 which emulates the FTDI serial chips (including MPSSE support).
  ☆11Updated 6 years ago
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆25Updated 4 years ago
• ultraembedded / usb_sniffer
  High Speed USB 2.0 capture device based on miniSpartan6+
  ☆57Updated 4 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆30Updated 4 years ago
• ObKo / USBCore
  USB Full-Speed/Hi-Speed Device Controller core for FPGA
  ☆31Updated 3 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆35Updated 4 months ago
• jsyk / miilink
  Connecting FPGA and MCU using Ethernet RMII
  ☆22Updated 8 years ago
• gtortone / esp-xvcd
  ESP8266 Xilinx Virtual Cable - wifi JTAG
  ☆39Updated 3 years ago
• tomverbeure / bscan_tools
  Various JTAG boundary scan tools
  ☆32Updated 3 years ago