suisuisi / Accelerating-CNN-with-FPGA
This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.
☆21Updated 5 years ago
Alternatives and similar repositories for Accelerating-CNN-with-FPGA:
Users that are interested in Accelerating-CNN-with-FPGA are comparing it to the libraries listed below
- 学习AXI接口，以及xilinx DDR3 IP使用☆36Updated 8 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- 帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目☆34Updated 3 years ago
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆59Updated 6 years ago
- SDRAM controller with AXI4 interface☆91Updated 5 years ago
- AHB DMA 32 / 64 bits☆54Updated 10 years ago
- AXI4 and AXI4-Lite interface definitions☆92Updated 4 years ago
- 文档编写☆12Updated 4 years ago
- fpga跑sobel识别算法☆32Updated 4 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆63Updated 4 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆62Updated 8 months ago
- Cortex M0 based SoC☆72Updated 3 years ago
- 基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）☆48Updated 5 years ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- Generic FIFO implementation with optional FWFT☆57Updated 4 years ago
- ☆36Updated 9 years ago
- RTL Verilog library for various DSP modules☆86Updated 3 years ago
- To help machines learn what we human beings are doing via a camera is important. Once it comes true, machines can make different response…☆52Updated 6 years ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆50Updated 7 years ago
- FFT implement by verilog_测试验证已通过☆55Updated 8 years ago
- AXI DMA 32 / 64 bits☆112Updated 10 years ago
- upgrade to e203 (a risc-v core)☆42Updated 4 years ago
- Implement a bitonic sorting network on FPGA☆42Updated 3 years ago
- Convolution Neural Network of vgg19 model in verilog☆46Updated 7 years ago
- Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …☆27Updated 4 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆39Updated 3 years ago
- FPGA 同步FIFO与异步FIFO☆30Updated 6 years ago
- An FPGA-based LZMA compressor for generic data compression. 基于FPGA的LZMA压缩器，用于通用数据压缩。☆82Updated last year
- 支持AXI总线协议的8k×8 SP SRAM☆25Updated 5 years ago
- Must-have verilog systemverilog modules☆33Updated 2 years ago