☆54Dec 10, 2024Updated last year
Alternatives and similar repositories for HLSPilot
Users that are interested in HLSPilot are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HLS-Eval: A Benchmark and Framework for Evaluating LLMs on High-Levels Synthesis Design Tasks☆24Updated this week
- Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)☆62Dec 17, 2024Updated last year
- LLM-DSE: Searching Accelerator Parameters with LLM Agents☆18May 22, 2025Updated last year
- Contract-Aware RTL Code Generation Agents with Temporal Tracing, Slicing and Formal Verification☆24Jan 28, 2026Updated 7 months ago
- ☆64Mar 24, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆74Aug 1, 2025Updated last year
- Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)☆41Jun 17, 2025Updated last year
- HLSyn benchmark for paper "Towards a Comprehensive Benchmark for FPGA Targeted High-Level Synthesis"☆33Dec 13, 2023Updated 2 years ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆70Dec 26, 2019Updated 6 years ago
- High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing☆54Jun 6, 2024Updated 2 years ago
- ☆50May 18, 2024Updated 2 years ago
- ☆32Mar 31, 2025Updated last year
- ☆18Apr 27, 2026Updated 4 months ago
- LLM4HWDesign Starting Toolkit☆20Oct 4, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 对酒当歌晚长亭在B站的关于Vitis HLS的视频教程的源代码☆26Oct 28, 2025Updated 10 months ago
- Full State Quantum Circuit Simulation Beyond Memory Limit☆15Aug 5, 2024Updated 2 years ago
- ☆12Aug 18, 2023Updated 3 years ago
- A new kind of hardware decompressor for Snappy decompression. Much faster than the existing software one.☆24Jun 27, 2023Updated 3 years ago
- Falcon Merlin Compiler☆41Jun 12, 2020Updated 6 years ago
- A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.☆25Jun 27, 2024Updated 2 years ago
- Agent skill for AMD/Xilinx Vitis HLS generation and FPGA design workflows.☆29Aug 14, 2026Updated last month
- MEEP FPGA Shell project, currently supporting Alveos u280 and u55c☆17Mar 14, 2024Updated 2 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆37May 19, 2022Updated 4 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- FPL'26 Optimization Contest☆54Sep 15, 2026Updated last week
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA (TCAD'24, NAACL'25)☆59May 21, 2025Updated last year
- OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection(ICCAD 2024)☆35Oct 20, 2024Updated last year
- ☆17Jan 14, 2025Updated last year
- ☆20Jun 1, 2023Updated 3 years ago
- ☆112Jun 20, 2025Updated last year
- Connecting bv_decide to SMTLIB.☆19Aug 27, 2026Updated 3 weeks ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆32May 24, 2025Updated last year
- Includes the SVD-based approximation algorithms for compressing deep learning models and the FPGA accelerators exploiting such approximat…☆17Mar 3, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- C++ code for HLS FPGA implementation of transformer☆25Sep 11, 2024Updated 2 years ago
- ☆17May 1, 2026Updated 4 months ago
- ☆24Nov 25, 2024Updated last year
- Vitis HLS LLVM source code and examples☆417Aug 4, 2026Updated last month
- Fast Symbolic Repair of Hardware Design Code☆40Jan 20, 2025Updated last year
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆38Mar 12, 2026Updated 6 months ago