ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)
☆59Feb 24, 2026Updated last week
Alternatives and similar repositories for Aries
Users that are interested in Aries are comparing it to the libraries listed below
Sorting:
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆16Dec 29, 2024Updated last year
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆35Updated this week
- Fork of LLVM to support AMD AIEngine processors☆189Updated this week
- ☆126Feb 27, 2026Updated last week
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆164Updated this week
- ☆12Apr 15, 2025Updated 10 months ago
- Implementation of the ePlace algorithm on the AMD Versal architecture, utilizing AIE, PL, and PS regions of the chip.☆11Feb 19, 2026Updated 2 weeks ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Jul 27, 2023Updated 2 years ago
- ☆13May 8, 2025Updated 9 months ago
- Retargetable ML compilers for the twenty-first century!☆13Apr 22, 2025Updated 10 months ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- The missing pieces (as far as boilerplate reduction goes) of the upstream MLIR python bindings.☆119Updated this week
- Horizontal Fusion☆24Jan 7, 2022Updated 4 years ago
- NPUEval is an LLM evaluation dataset written specifically to target AIE kernel code generation on RyzenAI hardware.☆29Nov 8, 2025Updated 3 months ago
- ☆169Updated this week
- ☆18Mar 4, 2025Updated last year
- ☆14Apr 24, 2024Updated last year
- Xilinx Modifications to Halide☆13May 3, 2021Updated 4 years ago
- ☆32Oct 21, 2025Updated 4 months ago
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Nov 27, 2024Updated last year
- CaPI: Compiler-assisted Performance Instrumentation☆18Updated this week
- LLVM/MLIR based compiler instrumentation of AMD GPU kernels☆19Jul 13, 2025Updated 7 months ago
- A System for Differential Debugging☆23Apr 10, 2025Updated 10 months ago
- A research shell for Alveo V80☆26Dec 17, 2025Updated 2 months ago
- My study note for mlsys☆14Nov 4, 2024Updated last year
- Tutorial for LLVM Dev Conference 2019.☆15Oct 23, 2019Updated 6 years ago
- A Top-Down Profiler for GPU Applications☆22Feb 29, 2024Updated 2 years ago
- Starlight: A Kernel Optimizer for GPU Processing☆16Jan 10, 2024Updated 2 years ago
- ☆25Jan 7, 2026Updated last month
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆24Jun 30, 2024Updated last year
- ☆19Nov 21, 2022Updated 3 years ago
- An MLIR-based toolchain for AMD AI Engine-enabled devices.☆593Updated this week
- MLIR based Tiny Graph Compiler [dev-stage]☆20Nov 22, 2024Updated last year
- Welcome to OptML! This repository is designed for those new to MLIR and machine learning-based optimizations. As a compiler enthusiast, I…☆20Sep 16, 2024Updated last year
- PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.☆29Feb 23, 2026Updated last week
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆60Aug 1, 2025Updated 7 months ago
- Allo Accelerator Design and Programming Framework (PLDI'24)☆353Updated this week
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆25May 18, 2025Updated 9 months ago
- OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection(ICCAD 2024)☆29Oct 20, 2024Updated last year