ekiwi / rtl-repairLinks
Fast Symbolic Repair of Hardware Design Code
☆32Updated 11 months ago
Alternatives and similar repositories for rtl-repair
Users that are interested in rtl-repair are comparing it to the libraries listed below
Sorting:
- LLM Evaluation Benchmark on Hardware Formal Verification☆34Updated 9 months ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆96Updated last year
- Equivalence checking with Yosys☆53Updated last month
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆47Updated last year
- This is a python repo for flattening Verilog☆20Updated 2 weeks ago
- ILA Model Database☆24Updated 5 years ago
- ☆43Updated last year
- Hardware Formal Verification Tool☆80Updated this week
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆53Updated 2 years ago
- ☆18Updated 5 years ago
- ☆20Updated last year
- CoreIR Symbolic Analyzer☆74Updated 5 years ago
- A Modeling and Verification Platform for SoCs using ILAs☆81Updated last year
- Collection for submission (Hardware Model Checking Benchmark)☆11Updated last month
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆30Updated 8 months ago
- ☆17Updated 2 years ago
- ☆18Updated this week
- This is a repo to store circuit design datasets☆19Updated last year
- Verification environment for the OpenHW Group's CORE-V High Performance Data Cache controller.☆19Updated 10 months ago
- Open source RTL simulation acceleration on commodity hardware☆33Updated 2 years ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆34Updated last year
- A hardware synthesis framework with multi-level paradigm☆43Updated 11 months ago
- Collection of digital hardware modules & projects (benchmarks)☆75Updated last month
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆41Updated last year
- ☆14Updated 5 years ago
- ☆12Updated 2 years ago
- DASS HLS Compiler☆29Updated 2 years ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆61Updated 7 months ago
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆39Updated 4 months ago
- ☆20Updated 3 years ago