OpenRigil / openrigil-rtl

Related projects: ⓘ

• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆54Updated 2 years ago
• chipsalliance / rocket
  The working draft to split rocket core out from rocket chip
  ☆14Updated 8 months ago
• cyyself / cyyrv64
  My RV64 CPU (Work in progress)
  ☆18Updated last year
• redpanda3 / chisel-book
  Hardware design with Chisel
  ☆31Updated last year
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆27Updated 8 months ago
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆15Updated 2 weeks ago
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆18Updated 6 months ago
• chipsalliance / chisel-nix
  Nix scripts used to manage the chisel projects.
  ☆19Updated this week
• jiegec / kb
  My knowledge base
  ☆36Updated last month
• Anillc / Yuri
  A riscv emulator.
  ☆17Updated 7 months ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆43Updated 2 months ago
• CircuitCoder / MeoWave
  ☆10Updated last year
• CircuitCoder / mill
  RV32I by cats
  ☆17Updated last year
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆21Updated last year
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆15Updated 2 weeks ago
• trivialmips / TrivialMIPS_Software
  Baremetal softwares for TrivialMIPS platform
  ☆10Updated 5 years ago
• mollybuild / RISCV-Measurement
  This is a repo for recording and reporting RISCV platform's test and measurement continuously.
  ☆52Updated 9 months ago
• cnrv / RVSC2023
  RISC-V Summit China 2023
  ☆42Updated 11 months ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆11Updated 2 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆30Updated 5 months ago
• twd2 / fpga-nat64
  A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.
  ☆30Updated 4 years ago
• chipsalliance / playground
  chipyard in mill :P
  ☆73Updated 9 months ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆12Updated 2 years ago
• ysyx-org / jemu-decoder
  The decoder library for jemu execution and web documentation
  ☆56Updated 11 months ago
• cnyangkun / nscscc2018
  nscscc2018
  ☆26Updated 5 years ago
• dramforever / opensbi-h
  WIP: A fork of OpenSBI, with software-emulated hypervisor extension support
  ☆35Updated last year
• jiegec / la-inst
  Examine and discover LoongArch instructions
  ☆14Updated 10 months ago
• fandahao17 / FPGAOL-Examples
  Example programs for FPGAOL
  ☆14Updated 3 years ago
• plctlab / plct-toolbox
  PLCT工具箱
  ☆27Updated 2 years ago
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 2 years ago