☆19Jul 25, 2018Updated 7 years ago
Alternatives and similar repositories for sdio-device
Users that are interested in sdio-device are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SDIO Device Verilog Core☆24Jul 25, 2018Updated 7 years ago
- ☆10Mar 11, 2022Updated 4 years ago
- Automated UVM testbench generator from Verilog RTL with optional LLM integration for advanced logic creation.☆27Feb 24, 2026Updated 4 months ago
- Imitate SDcard using FPGAs. 使用FPGA模拟伪装SD卡。☆136Sep 14, 2023Updated 2 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆16Sep 14, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A Verilog AMBA AHB Multilayer interconnect generator☆13Aug 8, 2017Updated 8 years ago
- An example Windows 10 UMDF driver for the sole purpose of sending MMIO to BAR regions of an FPGA☆21May 4, 2018Updated 8 years ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- Various JTAG boundary scan tools☆37Dec 1, 2020Updated 5 years ago
- Hogge Phase EMFI Detector☆15Jun 16, 2021Updated 5 years ago
- Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.☆39Feb 6, 2024Updated 2 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- download from opencores.org☆17May 4, 2018Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- riscv uclinux☆15Aug 9, 2019Updated 6 years ago
- Add ser2net service to OpenWrt LuCI.☆15Dec 31, 2013Updated 12 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆44May 26, 2021Updated 5 years ago
- Some embedded knowledge, especially for interview.☆24Dec 23, 2021Updated 4 years ago
- Fork of Laurent Pinchart's demo code for dmabuf sharing from v4l2 to DRM.☆20May 10, 2018Updated 8 years ago
- Embedded libc,especially for RISC-V.☆44May 10, 2026Updated last month
- Micro SD Express Card Template and Adapters☆34Jun 12, 2025Updated last year
- Utilities to flash Fomu from a Raspberry Pi☆23Jan 26, 2022Updated 4 years ago
- ☆18May 24, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Package evdev provides input and uinput handling on Linux.☆15Mar 25, 2019Updated 7 years ago
- Top level of PulseRain M10 RTL design☆16Mar 20, 2018Updated 8 years ago
- MT29F128G based NAND flash controller☆10Jun 17, 2021Updated 5 years ago
- Yilong's NetFPGA-10G Repo☆13May 7, 2015Updated 11 years ago
- ☆43Apr 2, 2021Updated 5 years ago
- xkDLA:XinKai Deep Learning Accelerator (RTL)☆43Jan 15, 2024Updated 2 years ago
- lightweight CMSIS-DAP implementation☆19Jan 1, 2020Updated 6 years ago
- Token ring communication protocol for low-cost, low-power embedded devices communicating over UART☆15May 3, 2018Updated 8 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆96Jan 14, 2026Updated 5 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A cheap but powerful CH55x BadUSB Cable with SL2.1s USBHUB, which makes the cable usable while executing payload. 廉价但强大,把CH552e和SL2.1s集成在…☆20Nov 23, 2022Updated 3 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆33Nov 6, 2018Updated 7 years ago
- USB HID device support for embedded devices☆14Feb 2, 2020Updated 6 years ago
- A simple PDM microphone interface on FPGA☆15Jan 16, 2022Updated 4 years ago
- DDR4 Simulation Project in System Verilog☆47Aug 18, 2014Updated 11 years ago
- RISCV CPU implementation in SystemVerilog☆32Jun 7, 2026Updated 3 weeks ago
- A CH551 based POV magic bar ;)☆15Dec 16, 2018Updated 7 years ago