☆19Jul 25, 2018Updated 7 years ago
Alternatives and similar repositories for sdio-device
Users that are interested in sdio-device are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SDIO Device Verilog Core☆24Jul 25, 2018Updated 7 years ago
- ☆10Mar 11, 2022Updated 4 years ago
- Imitate SDcard using FPGAs. 使用FPGA模拟伪装SD卡。☆136Sep 14, 2023Updated 2 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆16Sep 14, 2023Updated 2 years ago
- A Verilog AMBA AHB Multilayer interconnect generator☆13Aug 8, 2017Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog Repository for GIT☆36May 4, 2021Updated 5 years ago
- Various JTAG boundary scan tools☆37Dec 1, 2020Updated 5 years ago
- QuickDraw is the Macintosh library for creating bit-mapped graphics, which was used by MacPaint and other applications. It consists of a …☆41Jul 21, 2010Updated 15 years ago
- Hogge Phase EMFI Detector☆15Jun 16, 2021Updated 4 years ago
- Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.☆39Feb 6, 2024Updated 2 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- download from opencores.org☆16May 4, 2018Updated 8 years ago
- riscv uclinux☆15Aug 9, 2019Updated 6 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Add ser2net service to OpenWrt LuCI.☆15Dec 31, 2013Updated 12 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆44May 26, 2021Updated 5 years ago
- 基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）☆53Apr 23, 2020Updated 6 years ago
- Embedded libc，especially for RISC-V.☆44May 10, 2026Updated last month
- Micro SD Express Card Template and Adapters☆34Jun 12, 2025Updated 11 months ago
- C++ Arduino sketch with quaternion output☆21Jul 3, 2020Updated 5 years ago
- ☆18May 24, 2021Updated 5 years ago
- Top level of PulseRain M10 RTL design☆16Mar 20, 2018Updated 8 years ago
- MT29F128G based NAND flash controller☆10Jun 17, 2021Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Yilong's NetFPGA-10G Repo☆13May 7, 2015Updated 11 years ago
- ☆43Apr 2, 2021Updated 5 years ago
- xkDLA：XinKai Deep Learning Accelerator (RTL)☆42Jan 15, 2024Updated 2 years ago
- lightweight CMSIS-DAP implementation☆19Jan 1, 2020Updated 6 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆95Jan 14, 2026Updated 4 months ago
- A cheap but powerful CH55x BadUSB Cable with SL2.1s USBHUB, which makes the cable usable while executing payload. 廉价但强大，把CH552e和SL2.1s集成在…☆20Nov 23, 2022Updated 3 years ago
- Arduino library for the Seiko Epson RX8025T RTC.☆15Mar 14, 2026Updated 2 months ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆33Nov 6, 2018Updated 7 years ago
- USB HID device support for embedded devices☆14Feb 2, 2020Updated 6 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A simple PDM microphone interface on FPGA☆15Jan 16, 2022Updated 4 years ago
- DDR4 Simulation Project in System Verilog☆46Aug 18, 2014Updated 11 years ago
- A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)☆130Aug 29, 2022Updated 3 years ago
- RISCV CPU implementation in SystemVerilog☆32Updated this week
- A CH551 based POV magic bar ;)☆15Dec 16, 2018Updated 7 years ago
- A library to create shell-like command processors☆16Sep 12, 2024Updated last year
- Endianness trait with derive procedural macro.☆12Dec 31, 2022Updated 3 years ago