Alternatives and similar repositories for zCore-Design

Users that are interested in zCore-Design are comparing it to the libraries listed below

• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆32Updated 3 years ago
• oscomp / proj1-rustsbi
  实现和扩展RISC-V SBI运行时，使之能够支持并运行操作系统
  ☆14Updated 10 months ago
• rcore-os / rCore-Tutorial-v3-arm64
  Let's write an OS which can run on ARM in Rust from scratch! (🚧WIP)
  ☆17Updated 3 years ago
• luojia65 / DailySchedule
  ☆22Updated 4 years ago
• HUST-OS / design-pattern-notes
  各类内核的设计思路
  ☆19Updated 4 years ago
• luojia65 / tiaoshi-dashi-sbi
  调试大师：你见过最强的内核调试器
  ☆36Updated 4 years ago
• rcore-os / rcore-user
  User programs for rCore OS
  ☆19Updated 3 years ago
• Gallium70 / rv-n-ext-impl
  ☆12Updated 2 years ago
• oscomp / proj23-lightweight-hypervisor
  在RISC-V处理器上实现一个轻量级的Hypervisor。
  ☆12Updated 5 years ago
• rcore-os / zCore-Tutorial
  [WIP] Tutorial for zCore kernel.
  ☆59Updated 4 years ago
• Oyami-Srk / RISCV-GDB-Paging
  Paging Debug tool for GDB using python
  ☆13Updated 3 years ago
• rustsbi / sbi-rt
  Simple RISC-V SBI runtime library; designated for supervisor use
  ☆25Updated 2 years ago
• HUST-OS / luojia-os-labs
  洛佳的异步内核实验室
  ☆25Updated 4 years ago
• rcore-os / ext2-rs
  An implementation of ext2 filesystem in Rust
  ☆15Updated 4 years ago
• xen0n / larva
  PoC LoongArch - RISC-V emulator
  ☆32Updated 2 years ago
• rustsbi / plic
  Rust support for RISC-V Platform-Level Interrupt Controller
  ☆10Updated 3 years ago
• KuangjuX / hypocaust-2
  hypocaust-2, a type-1 hypervisor with H extension run on RISC-V machine
  ☆59Updated 2 years ago
• equation314 / nimbos
  An experimental RTOS written in Rust.
  ☆39Updated 3 years ago
• rustsbi / rustsbi-hifive-unmatched
  RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core
  ☆17Updated 2 years ago
• rcore-os / zcore_tutorial_developers
  zcore_tutorial文档撰写工作以及单元测试工作组
  ☆19Updated 5 years ago
• rustsbi / xuantie
  Low level access to T-Head Xuantie RISC-V processors
  ☆34Updated 2 months ago
• xiyurain / UltraOS
  A Rust based Multicore OS developed by UltraTeam, HITsz. Currently updated on https://gitee.com/LoanCold/ultraos_backup
  ☆46Updated last year
• rcore-os / RVM
  Rcore Virtual Machine
  ☆115Updated last year
• js2xxx / umi
  An RISC-V experimental OS
  ☆25Updated 2 years ago
• luojia65 / zihai
  自嗨虚拟化软件 - 'Enjoy yourself' type-1 hypervisor software
  ☆25Updated 3 years ago
• AsyncOS / AsyncOS.github.io
  ☆12Updated last week
• stemnic / rustyvisor
  Hypervisor written in Rust for the RISC-V 1.0 hypervisor extension
  ☆16Updated last year
• shady831213 / terminus
  A riscv isa simulator in rust.
  ☆65Updated 2 years ago
• rustsbi / serde-device-tree
  Serialize & deserialize device tree binary using serde
  ☆23Updated last month
• OS-F-4 / usr-intr
  项目的主仓库
  ☆25Updated 3 years ago