A VHDL frontend for Yosys
☆105Feb 27, 2017Updated 9 years ago
Alternatives and similar repositories for yodl
Users that are interested in yodl are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- Yosys Plugins☆23Jul 16, 2019Updated 7 years ago
- VHDL synthesis (based on ghdl)☆370Oct 18, 2026Updated 2 weeks ago
- VHDL compiler and simulator☆900Updated this week
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Tools and Examples for IcoBoard☆80Jul 13, 2021Updated 5 years ago
- iCE40 floorplan viewer☆24Jun 23, 2018Updated 8 years ago
- lightweight open HLS for FPGA rapid prototyping☆20Mar 22, 2018Updated 8 years ago
- Place and route tool for FPGAs☆422Jul 28, 2019Updated 7 years ago
- Open FPGA tools☆259Mar 30, 2020Updated 6 years ago
- Generate conversions to/from VHDL types and std_logic_vector. Generate python-based tests.☆12Jul 7, 2026Updated 3 months ago
- A wrapper for GHDL to make it look like Mentor's ModelSim. Helpful for use with programs like Sigasi.☆11Jan 21, 2018Updated 8 years ago
- Next-Generation FPGA Place-and-Route☆10Aug 1, 2018Updated 8 years ago
- SDI interface board for the apertus° AXIOM beta camera☆13Jan 19, 2019Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 🔍 Zoomable Waveform viewer for the Web☆43Nov 3, 2020Updated 5 years ago
- Python for BitBanging SPI PROM on IceZero FPGA board from RaspPi GPIO pins☆13Jan 14, 2019Updated 7 years ago
- Yet Another VHDL tool☆30May 15, 2017Updated 9 years ago
- RISCV SoftCPU Contest 2018☆14Nov 17, 2018Updated 7 years ago
- A JSON library implemented in VHDL.☆87Jul 13, 2026Updated 3 months ago
- Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.☆14Sep 22, 2025Updated last year
- Experimental graphic editor for open FPGAs.☆50Mar 29, 2016Updated 10 years ago
- Virtual development board for HDL design☆44Mar 31, 2023Updated 3 years ago
- A VHDL Core Library.☆18Mar 29, 2017Updated 9 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A Sphinx domain providing VHDL language support.☆21Updated this week
- My pergola FPGA projects☆30Jun 23, 2021Updated 5 years ago
- Python tools to interact with boundary scan-capable devices. Useful for reverse engineering, testing, etc.☆17May 3, 2016Updated 10 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆36Jul 15, 2024Updated 2 years ago
- ☆64Jul 21, 2020Updated 6 years ago
- VHDLproc is a VHDL preprocessor☆25May 12, 2022Updated 4 years ago
- a project to check the FOSS synthesizers against vendors EDA tools☆12Sep 26, 2020Updated 6 years ago
- ☆26Sep 27, 2018Updated 8 years ago
- Streaming based VHDL parser.☆86Updated this week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- PCIe stack written in Amaranth.☆18Apr 27, 2026Updated 6 months ago
- ice40 UltraPlus demos☆16Oct 4, 2019Updated 7 years ago
- Documenting the Anlogic FPGA bit-stream format.☆91Dec 25, 2022Updated 3 years ago
- I want to learn [n]Migen.☆44Jan 26, 2020Updated 6 years ago
- ☆25Jan 16, 2019Updated 7 years ago
- ☆20May 5, 2020Updated 6 years ago
- A curated list of awesome VHDL IP cores, frameworks, libraries, software and resources.☆85Feb 8, 2020Updated 6 years ago