HDL symbol generator
☆204Feb 2, 2023Updated 3 years ago
Alternatives and similar repositories for symbolator
Users that are interested in symbolator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simple parser for extracting VHDL documentation☆74Jul 12, 2024Updated last year
- Generate symbols from HDL components/modules☆22Feb 6, 2023Updated 3 years ago
- Flexible VHDL library☆197Jun 28, 2023Updated 3 years ago
- A JSON library implemented in VHDL.☆85Feb 8, 2026Updated 4 months ago
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- An abstract language model of VHDL written in Python.☆64Jun 25, 2026Updated last week
- Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4☆329Jun 30, 2025Updated last year
- A Sphinx domain providing VHDL language support.☆21Dec 18, 2023Updated 2 years ago
- VUnit is a unit testing framework for VHDL/SystemVerilog☆835May 14, 2026Updated last month
- bit field diagram renderer☆395Feb 22, 2024Updated 2 years ago
- draws an SVG schematic from a JSON netlist☆800Jan 25, 2024Updated 2 years ago
- OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...☆263Jun 6, 2026Updated last month
- Language server based on ghdl☆103Updated this week
- Style guide enforcement for VHDL☆245Jun 19, 2026Updated 2 weeks ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Streaming based VHDL parser.☆86Jul 15, 2024Updated last year
- Sphinx Extension which generates various types of diagrams from Verilog code.☆65Sep 25, 2023Updated 2 years ago
- VHDL-2008 Support Library☆62Oct 11, 2016Updated 9 years ago
- Repurposing existing HDL tools to help writing better code☆224Jun 21, 2026Updated 2 weeks ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,429Updated this week
- Sphinx extension for visual documentation of hardware written in HWT☆12Nov 12, 2025Updated 7 months ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆37Dec 24, 2020Updated 5 years ago
- An abstraction library for interfacing EDA tools☆774Updated this week
- pyVhdl2sch is a python based VHDL to (pdf) schematic converter☆33Oct 20, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 4 years ago
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆606Jul 30, 2025Updated 11 months ago
- Repository containing the DSP gateware cores☆14Mar 9, 2026Updated 3 months ago
- Hardware Description Languages☆1,158Apr 6, 2026Updated 2 months ago
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆52Jun 28, 2026Updated last week
- VHDL String Formatting Library☆27Apr 27, 2024Updated 2 years ago
- 🔍 Zoomable Waveform viewer for the Web☆43Nov 3, 2020Updated 5 years ago
- Virtual development board for HDL design☆42Mar 31, 2023Updated 3 years ago
- VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!☆718Dec 14, 2025Updated 6 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆451Apr 22, 2026Updated 2 months ago
- This repository contains synthesizable examples which use the PoC-Library.☆39Dec 24, 2020Updated 5 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆48Feb 12, 2026Updated 4 months ago
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆225Jun 22, 2026Updated last week
- A curated list of awesome VHDL IP cores, frameworks, libraries, software and resources.☆85Feb 8, 2020Updated 6 years ago
- An open-source VHDL library for FPGA design.☆32Jun 2, 2022Updated 4 years ago
- VHDL synthesis (based on ghdl)☆367Jun 22, 2026Updated last week