antmicro / zephyrLinks
Primary GIT Repository for the Zephyr Project
☆12Updated this week
Alternatives and similar repositories for zephyr
Users that are interested in zephyr are comparing it to the libraries listed below
Sorting:
- Xilinx Virtual Cable Daemon☆20Updated 6 years ago
- Simple but Small Frame Grabber☆38Updated 4 years ago
- Axiom Alpha prototype hardware source files (electronic schematics, documentation, PCB layouts, etc.)☆22Updated 11 years ago
- ZPUino HDL implementation☆91Updated 7 years ago
- Freecores website☆19Updated 9 years ago
- Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)☆21Updated 10 years ago
- All Logi specific HDL code (platform specific interface, extension boards, specific hdl, etc)☆31Updated 9 years ago
- released krtkl schematics☆57Updated 7 years ago
- Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.☆20Updated 10 years ago
- This repo is for Efinix Xyloni development board users. It has projects and software to get you started working with the board.☆45Updated 3 years ago
- Open Source ZYNQ Board☆31Updated 10 years ago
- ☆65Updated 12 years ago
- Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.☆66Updated 2 years ago
- Tools and Examples for IcoBoard☆80Updated 4 years ago
- mirror of https://git.elphel.com/Elphel/x393☆40Updated 2 years ago
- PolarFire SoC Documentation☆61Updated last month
- An Arduino UNO compatible implementation for the iCE40 FPGAs☆20Updated 5 years ago
- Generic Logic Interfacing Project☆48Updated 5 years ago
- Axiom Alpha prototype software (FPGA, Linux, etc.)☆30Updated 10 years ago
- ☆15Updated 6 months ago
- verilog tutorials for iCE40HX8K Breakout Board☆23Updated 9 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆20Updated 6 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.☆51Updated 12 years ago
- Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces☆35Updated last year
- ICE40 8K FPGA / STM32F4 development system☆62Updated 8 years ago
- Making Lattice SensAI work properly on tinyVision products☆12Updated 3 years ago
- MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…☆17Updated 12 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆20Updated 2 months ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆32Updated 3 years ago