stanford-mast / zsimLinks
A fast and scalable x86-64 multicore simulator
☆31Updated 4 years ago
Alternatives and similar repositories for zsim
Users that are interested in zsim are comparing it to the libraries listed below
Sorting:
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆22Updated 4 years ago
- Creating beautiful gem5 simulations☆49Updated 4 years ago
- SST Architectural Simulation Components and Libraries☆101Updated this week
- Joint HPS and ETH Repository to work towards open sourcing Scarab and Ramulator☆78Updated this week
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆44Updated 7 months ago
- Artifact, reproducibility, and testing utilites for gem5☆23Updated 4 years ago
- ☆20Updated 2 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆49Updated 3 years ago
- ☆17Updated 4 years ago
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆38Updated last month
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆57Updated 5 years ago
- Heterogeneous simulator for DECADES Project☆32Updated last year
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- A heterogeneous architecture timing model simulator.☆165Updated last week
- gem5 Tips & Tricks☆70Updated 5 years ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆83Updated 2 years ago
- This is a fork of zsim (see https://github.com/s5z/zsim) which integrates the NVMain main memory simulator, adding 3D stacking and non-vo…☆25Updated 10 years ago
- Tutorial Material from the SST Team☆22Updated last month
- ☆11Updated 3 years ago
- This is a processing-in-memory simulator which models 3D-stacked memory within gem5. Also includes the workloads used for IMPICA (In-Memo…☆47Updated 8 years ago
- ☆63Updated 8 years ago
- SHMA: Software-managed Caching for Hybrid DRAM/NVM Memory Architectures, implemented with zsim and nvmain hybrid simulators☆62Updated 8 years ago
- gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system☆78Updated 6 years ago
- NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories☆84Updated 6 years ago
- A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical pa…☆74Updated this week
- ☆19Updated 4 years ago
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- A Shared Memory Multithreaded Graph Benchmark Suite for Multicores☆36Updated 3 months ago
- Quick & Flexible Rack-Scale Computer Architecture Simulator☆49Updated last week