shieldforever / NeuronQuantLinks
[ASP-DAC 2025] "NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks" Official Implementation
☆15Updated 11 months ago
Alternatives and similar repositories for NeuronQuant
Users that are interested in NeuronQuant are comparing it to the libraries listed below
Sorting:
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆37Updated 5 months ago
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆17Updated 10 months ago
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆31Updated last year
- ☆48Updated 4 years ago
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆25Updated 3 years ago
- ☆32Updated 10 months ago
- ☆19Updated 2 years ago
- ☆12Updated 2 years ago
- ☆18Updated last year
- ViTALiTy (HPCA'23) Code Repository☆23Updated 2 years ago
- ☆56Updated 2 months ago
- Simulator for LLM inference on an abstract 3D AIMC-based accelerator☆25Updated 4 months ago
- ☆35Updated 5 years ago
- MICRO22 artifact evaluation for Sparseloop☆47Updated 3 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Updated 3 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆62Updated 3 months ago
- Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and …☆13Updated 2 years ago
- A bit-level sparsity-awared multiply-accumulate process element.☆18Updated last year
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆46Updated last year
- (Verilog) A simple convolution layer implementation with systolic array structure☆13Updated 3 years ago
- ☆25Updated last year
- [TRETS'23, FPT'20] CHIP-KNN: Configurable and HIgh-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs☆18Updated last year
- The wafer-native AI accelerator simulation platform and inference engine.☆49Updated last month
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆56Updated 2 years ago
- ☆84Updated last month
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆53Updated 5 months ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆87Updated 9 months ago
- [DATE 2025] Official implementation and dataset of AIrchitect v2: Learning the Hardware Accelerator Design Space through Unified Represen…☆19Updated last year
- A general framework for optimizing DNN dataflow on systolic array☆38Updated 5 years ago
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆122Updated last year