Alternatives and similar repositories for NeuronQuant:

Users that are interested in NeuronQuant are comparing it to the libraries listed below

• RuokaiYin / LoAS
  LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.
  ☆10Updated last month
• dubcyfor3 / Prosperity
  The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity
  ☆26Updated 3 months ago
• booniebears / CoMN
  ☆15Updated last year
• CASR-HKU / AGNA-FCCM2023
  ☆12Updated last year
• KULeuven-MICAS / zigzag-imc
  HW accelerator mapping optimization framework for in-memory computing
  ☆22Updated 3 months ago
• Zhu-Zixuan / Bitlet-PE
  A bit-level sparsity-awared multiply-accumulate process element.
  ☆15Updated 10 months ago
• CASR-HKU / DPACS
  ☆18Updated 2 years ago
• I-Doctor / RTL_library_of_basic_hardware_units
  Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and …
  ☆11Updated last year
• sjtu-zhao-lab / SALO
  An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences
  ☆26Updated last year
• Accelergy-Project / processing-in-memory-design
  ☆26Updated last year
• RuokaiYin / SATA_Sim
  SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…
  ☆26Updated 7 months ago
• mit-emze / raella
  ☆9Updated last year
• YulhwaKim / RRAMScalable_BNN
  Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators
  ☆11Updated 6 years ago
• SNU-HPCS / NeuroSync
  NeuroSync: A Scalable and Accurate Brain Simulation System using Safe and Efficient Speculation (HPCA 2022)
  ☆11Updated 2 years ago
• CRAFT-THU / XB-Sim
  A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration
  ☆34Updated 2 years ago
• neurosim / DNN_NeuroSim_V2.0
  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)
  ☆48Updated 3 years ago
• fffasttime / AnyPackingNet
  ☆26Updated last month
• nimish15shah / DAG_Processor
  A DAG processor and compiler for a tree-based spatial datapath.
  ☆13Updated 2 years ago
• adamgallas / FireFly-v2
  [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…
  ☆17Updated last year
• gkrish19 / SIAM-Chiplet-based-Scalable-In-Memory-Acceleration-with-Mesh-for-Deep-Neural-Networks
  A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.
  ☆21Updated 10 months ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆77Updated 3 years ago
• isakedo / DNNsim
  ☆34Updated 4 years ago
• GATECH-EIC / ViTALiTy
  ViTALiTy (HPCA'23) Code Repository
  ☆22Updated 2 years ago
• gicLAB / SECDA
  ☆22Updated 2 years ago
• DanielGerlinghoff / radix-encoding
  Framework for radix encoded SNN on FPGA
  ☆12Updated 3 years ago
• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆20Updated 2 years ago
• horizon-research / systolic-array-dataflow-optimizer
  A general framework for optimizing DNN dataflow on systolic array
  ☆35Updated 4 years ago
• RuokaiYin / MINT_Quantization
  MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award
  ☆13Updated last year
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆43Updated 2 years ago
• jha-lab / acceltran
  [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
  ☆40Updated last year