Alternatives and similar repositories for gem5-runahead

Users that are interested in gem5-runahead are comparing it to the libraries listed below

• bsc-mem / Mess-simulator
  A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.
  ☆26Updated 2 months ago
• kuczmmar / Runahead
  Running ahead of memory latency - Part II project
  ☆10Updated 2 years ago
• lshpku / gem5-fs-handbook
  gem5 FS模式实验手册
  ☆44Updated 2 years ago
• cry-daniel / Computer-Architecture-Learning
  ☆65Updated 2 years ago
• qiyancos / gem5-with-chinese-comment
  Gem5 with chinese comment and introduction (master) and some other std gem5 version.
  ☆42Updated 3 years ago
• CMU-SAFARI / Load-Inspector
  A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…
  ☆22Updated last year
• baichen318 / arch-explorer
  ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis
  ☆34Updated last year
• CMU-SAFARI / Virtuoso
  Virtuoso is a fast, accurate and versatile simulation framework designed for virtual memory research. Virtuoso uses a new simulation met…
  ☆72Updated 2 weeks ago
• agusnt / Berti-Artifact
  An artifact for Berti: an Accurate and Timely Local-Delta Data Prefetcher
  ☆32Updated 2 years ago
• CMU-SAFARI / Hermes
  A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical pa…
  ☆75Updated last month
• miaochenlu / Gem5_tutorials
  ☆20Updated 4 months ago
• miaochenlu / learn_prefetcher
  hardware & software prefetcher
  ☆28Updated last year
• shinezyy / gem5-official-old
  ☆20Updated 4 years ago
• PolyArch / gem-forge-framework
  ☆25Updated 2 years ago
• CMU-SAFARI / Pythia-HDL
  Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, …
  ☆17Updated 4 years ago
• lshpku / hwd-prefetch-study
  A Study of the SiFive Inclusive L2 Cache
  ☆67Updated last year
• ConvolutedDog / gpgpu-sim-comments
  GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。
  ☆23Updated 9 months ago
• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆38Updated 2 years ago
• pku-liang / ksim
  ☆46Updated 8 months ago
• gem5 / gem5-resources
  The official repository for the gem5 resources sources.
  ☆73Updated 2 months ago
• nus-comparch / looppoint
  Sampled simulation of multi-threaded applications using LoopPoint methodology
  ☆21Updated 2 months ago
• xuefeng16 / Tyche-Artifact
  [TACO 2024] A hardware prefetching framework employing Tyche, a hardware prefetcher designed for indirect memory access patterns.
  ☆23Updated last year
• PKUZHOU / NeoMem-MICRO-2024
  The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering
  ☆57Updated last year
• suchandler96 / gem5-NVDLA
  ☆35Updated 6 months ago
• darchr / dram-cache-model
  This is where gem5 based DRAM cache models live.
  ☆17Updated 2 years ago
• sfu-arch / X-Cache
  ☆14Updated 3 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆70Updated last year
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆49Updated last year
• pku-liang / Hestia
  ☆17Updated 6 months ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆42Updated 2 years ago