Yufeng98 / CENTLinks
Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025
☆100Updated 5 months ago
Alternatives and similar repositories for CENT
Users that are interested in CENT are comparing it to the libraries listed below
Sorting:
- ☆153Updated 8 months ago
- A Cycle-level simulator for M2NDP☆31Updated 2 months ago
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆95Updated last year
- ☆97Updated last year
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆57Updated last year
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆33Updated last year
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- ☆65Updated 4 years ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆36Updated 2 months ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆157Updated 8 months ago
- Processing-In-Memory (PIM) Simulator☆197Updated 10 months ago
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆37Updated 10 months ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆178Updated 3 years ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆41Updated 3 months ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆65Updated 10 months ago
- ☆194Updated last year
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆72Updated 5 months ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆29Updated 2 years ago
- ☆29Updated 3 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆39Updated 2 years ago
- A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.☆29Updated last week
- Github repository of HPCA 2025 paper "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆15Updated last month
- ☆27Updated 10 months ago
- ☆26Updated 2 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆71Updated last year
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆97Updated 5 months ago
- ☆78Updated 4 years ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆85Updated 2 years ago
- PIMeval simulator and PIMbench suite☆35Updated 2 months ago
- PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is dev…☆162Updated last year