thinkoco / microsoft_fpgaLinks
Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP
☆63Updated 3 years ago
Alternatives and similar repositories for microsoft_fpga
Users that are interested in microsoft_fpga are comparing it to the libraries listed below
Sorting:
- Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)☆45Updated 5 years ago
- Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)☆162Updated 2 years ago
- 国产VU13P加速卡资料☆81Updated 9 months ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆76Updated last year
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆82Updated last year
- DisplayPort IP-core☆83Updated 3 weeks ago
- YPCB-00338-1P1 Hack☆75Updated last year
- ☆80Updated 3 years ago
- Xilinx PCIe to MIG DDR4 example designs and custom part data files☆39Updated last year
- IEEE P1735 decryptor for VHDL☆39Updated 10 years ago
- ☆54Updated 3 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- SDRAM controller with AXI4 interface☆100Updated 6 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆81Updated 3 years ago
- IP operations in verilog (simulation and implementation on ice40)☆61Updated 6 years ago
- SpinalHDL - Cryptography libraries☆57Updated last year
- Computational Storage Device based on the open source project OpenSSD.☆29Updated 5 years ago
- ☆18Updated 4 years ago
- Stratix V PCIe Ledblink (for usage in Microsoft Storey Peak boards)☆23Updated 4 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆97Updated 5 years ago
- ☆36Updated 5 years ago
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆30Updated 3 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆67Updated 2 years ago
- Basic floating-point components for RISC-V processors☆67Updated 6 years ago
- Verilog Ethernet Switch (layer 2)☆50Updated 2 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆85Updated last year
- ☆20Updated 4 years ago
- Tang Mega 138K Pro examples☆93Updated 5 months ago
- ☆34Updated 4 years ago