maswx / vu13p
国产VU13P加速卡资料
☆58Updated 5 months ago
Related projects ⓘ
Alternatives and complementary repositories for vu13p
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆38Updated last year
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆61Updated 5 months ago
- ☆46Updated 2 years ago
- Verilog Ethernet Switch (layer 2)☆34Updated last year
- An FPGA-based high performance MPEG2 encoder for video compression. 基于FPGA的高性能MPEG2视频编码器,可实现视频压缩。☆116Updated 9 months ago
- Open-source high performance AXI4-based HyperRAM memory controller☆57Updated 2 years ago
- NVMe Controller featuring Hardware Acceleration☆75Updated 3 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆129Updated 4 months ago
- Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)☆114Updated last year
- Ethernet switch implementation written in Verilog☆40Updated last year
- A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)☆107Updated 2 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆87Updated 4 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆54Updated 10 months ago
- PCIe based accelerator for VCU1525 with xDMA based on Windows10 and Windows Server 2016 development environment☆51Updated 6 years ago
- An FPGA-based GZIP (deflate) compressor, which input raw data and output standard GZIP format (as known as .gz file format). 基于FPGA的GZIP压…☆98Updated last year
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆66Updated 3 years ago
- AXI Interface Nand Flash Controller (Sync mode)☆82Updated 3 months ago
- SPI-Flash XIP Interface (Verilog)☆35Updated 3 years ago
- Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核☆20Updated last year
- DisplayPort IP-core☆50Updated 2 weeks ago
- UART -> AXI Bridge☆55Updated 3 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆35Updated 4 months ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆58Updated 4 years ago
- Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks☆63Updated this week
- ☆37Updated 7 years ago
- Interface Protocol in Verilog