Alternatives and similar repositories for pp-sp-linux-driver

Users that are interested in pp-sp-linux-driver are comparing it to the libraries listed below

• j-marjanovic / pp-sp-reference-design
  ☆46Updated 3 years ago
• j-marjanovic / otma-pin-re
  ☆18Updated 4 years ago
• carlosedp / chisel-fpga-pinfinder
  A Chisel implementation for an FPGA Pin Finder thru UART
  ☆17Updated 9 months ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• defparam / PCI2Nano-PCB
  An FPGA/PCI Device Reference Platform
  ☆28Updated 4 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆59Updated 3 weeks ago
• ruurdk / storey-peak
  Collected resources and getting started with Azure PCIe FPGA device
  ☆20Updated 4 months ago
• j-marjanovic / ocs-tray-mezzanine-adapter
  PCIe adapter for an FPGA accelerator for Open CloudServer
  ☆23Updated 5 years ago
• tongchen126 / fpga_pcie_ethernet
  ☆16Updated 3 years ago
• swetland / os-workshop
  Some materials and sample source for RV32 OS projects.
  ☆22Updated 3 years ago
• lmEshoo / sp-i586
  soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…
  ☆32Updated 8 years ago
• Wren6991 / ChristmasSoC
  Dual-core RISC-V SoC with JTAG, atomics, SDRAM
  ☆25Updated 3 years ago
• OldRepoPreservation / mpeg2fpga
  An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.
  ☆24Updated 6 years ago
• j-marjanovic / jtag-quartus-ft232h
  ☆46Updated 3 years ago
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆57Updated 4 years ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆29Updated 3 years ago
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆49Updated 5 months ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆42Updated 4 years ago
• sparrowgrine / prjtritium
  ☆22Updated 3 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated last year
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• whitequark / Yumewatari
  妖刀夢渡
  ☆59Updated 6 years ago
• jevinskie / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆12Updated 2 years ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆42Updated last week
• brouhaha / xchange
  Change part number or package in a Xilinx 7-series FPGA bitstream
  ☆39Updated 5 years ago
• pepijndevos / 74xx-liberty
  ☆13Updated 3 years ago
• tow3rs / jtag-mpsse-blaster
  Use an MPSSE FTDI device as a JTAG interface in Quartus tools
  ☆21Updated last year
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆33Updated 6 months ago
• chriz2600 / quartus-lite
  Quartus Lite docker
  ☆39Updated 4 years ago
• tomverbeure / intel_jtag_primitive_blog
  How to use the Intel JTAG primitive without using virtual JTAG
  ☆17Updated 3 years ago