Alternatives and similar repositories for catapult-v3-smartnic-re

Users that are interested in catapult-v3-smartnic-re are comparing it to the libraries listed below

• thinkoco / microsoft_fpga
  Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP
  ☆63Updated 3 years ago
• maswx / vu13p
  国产VU13P加速卡资料
  ☆82Updated 10 months ago
• Parretto / DisplayPort
  DisplayPort IP-core
  ☆83Updated last month
• wirebond / catapult_v2_pikes_peak
  Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)
  ☆46Updated 5 years ago
• j-marjanovic / pp-sp-reference-design
  ☆51Updated 4 years ago
• sipeed / TangMega-138KPro-example
  Tang Mega 138K Pro examples
  ☆95Updated 5 months ago
• enjoy-digital / usb3_pipe
  USB3 PIPE interface for Xilinx 7-Series
  ☆242Updated 3 weeks ago
• TiferKing / ypcb_00338_1p1_hack
  YPCB-00338-1P1 Hack
  ☆78Updated last year
• TiferKing / as02mc04_hack
  Alibaba Cloud AS02MC04 hack
  ☆30Updated last year
• j-marjanovic / jtag-quartus-ft232h
  ☆54Updated 3 years ago
• SuperSodaSea / Plugcat
  Plug & Play.
  ☆46Updated 2 months ago
• antmicro / fastvdma
  Antmicro's fast, vendor-neutral DMA IP in Chisel
  ☆128Updated 8 months ago
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆236Updated 3 years ago
• derekmulcahy / xvcpi
  Xilinx Virtual Cable Server for Raspberry Pi
  ☆124Updated 3 years ago
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆285Updated last year
• ZipCPU / eth10g
  10Gb Ethernet Switch
  ☆252Updated 3 months ago
• ruurdk / storey-peak
  Collected resources and getting started with Azure PCIe FPGA device
  ☆37Updated 11 months ago
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆86Updated last year
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆410Updated last week
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆76Updated last year
• risclite / R8051
  8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
  ☆196Updated 6 years ago
• Xilinx / XilinxVirtualCable
  Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or S…
  ☆265Updated 2 months ago
• CospanDesign / nysa-sata
  ☆89Updated 8 years ago
• forconesi / nfmac10g
  Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
  ☆72Updated 9 years ago
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆351Updated 3 months ago
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆130Updated 3 years ago
• RHSResearchLLC / NiteFury-and-LiteFury
  Public repository for Litefury & Nitefury
  ☆311Updated last year
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆161Updated 10 months ago
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆265Updated 6 years ago
• dmitrodem / p1735_decryptor
  IEEE P1735 decryptor for VHDL
  ☆39Updated 10 years ago