Alternatives and similar repositories for otma-pin-re:

Users that are interested in otma-pin-re are comparing it to the libraries listed below

• wirebond / catapult_v2_pikes_peak
  Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)
  ☆41Updated 4 years ago
• j-marjanovic / jtag-quartus-ft232h
  ☆45Updated 3 years ago
• j-marjanovic / pp-sp-reference-design
  ☆45Updated 3 years ago
• brouhaha / xchange
  Change part number or package in a Xilinx 7-series FPGA bitstream
  ☆37Updated 4 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆36Updated 2 years ago
• j-marjanovic / ocs-tray-mezzanine-adapter
  PCIe adapter for an FPGA accelerator for Open CloudServer
  ☆23Updated 4 years ago
• sparrowgrine / prjtritium
  ☆22Updated 3 years ago
• b224hisl / rioschip
  ☆33Updated 2 years ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆41Updated 3 months ago
• craigjb / fuse-zynq
  Generate Zynq configurations without using the vendor GUI
  ☆30Updated last year
• epfl-vlsc / bitfiltrator
  Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats
  ☆37Updated 2 years ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆42Updated 4 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆39Updated 2 months ago
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆56Updated 4 years ago
• dmitrodem / p1735_decryptor
  IEEE P1735 decryptor for VHDL
  ☆31Updated 9 years ago
• FPGA-Research / byteman
  Bitstream relocation and manipulation tool.
  ☆44Updated 2 years ago
• ruurdk / storey-peak
  Collected resources and getting started with Azure PCIe FPGA device
  ☆18Updated last month
• paulscherrerinstitute / xvcSupport
  ☆18Updated 4 years ago
• carlosedp / chisel-fpga-pinfinder
  A Chisel implementation for an FPGA Pin Finder thru UART
  ☆16Updated 6 months ago
• openXC7 / xc7k325t-blinky-nextpnr
  ☆45Updated 2 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆37Updated 5 years ago
• rriggs / kintex-7-hpc-v2-board-files
  Vivado board files for the Kintex 7 HPC V2 FPGA board.
  ☆26Updated 4 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated last year
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated 11 months ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆62Updated 3 weeks ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆57Updated last month
• enjoy-digital / litesata_axiom
  ☆12Updated 4 years ago
• openXC7 / nextpnr-xilinx
  Experimental flows using nextpnr for Xilinx devices
  ☆42Updated 2 weeks ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago