Alternatives and similar repositories for otma-pin-re

Users that are interested in otma-pin-re are comparing it to the libraries listed below

• wirebond / catapult_v2_pikes_peak
  Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)
  ☆42Updated 5 years ago
• j-marjanovic / pp-sp-reference-design
  ☆46Updated 3 years ago
• j-marjanovic / jtag-quartus-ft232h
  ☆50Updated 3 years ago
• brouhaha / xchange
  Change part number or package in a Xilinx 7-series FPGA bitstream
  ☆39Updated 5 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆93Updated 5 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated last year
• FPGA-Research / byteman
  Bitstream relocation and manipulation tool.
  ☆47Updated 2 years ago
• rriggs / kintex-7-hpc-v2-board-files
  Vivado board files for the Kintex 7 HPC V2 FPGA board.
  ☆26Updated 5 years ago
• enjoy-digital / litex-acorn-baseboard
  LiteX development baseboards arround the SQRL Acorn.
  ☆68Updated 5 months ago
• thinkoco / microsoft_fpga
  Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP
  ☆58Updated 2 years ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆46Updated 5 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆37Updated 6 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆60Updated 2 months ago
• sparrowgrine / prjtritium
  ☆23Updated 3 years ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆42Updated 2 months ago
• b224hisl / rioschip
  ☆33Updated 2 years ago
• j-marjanovic / ocs-tray-mezzanine-adapter
  PCIe adapter for an FPGA accelerator for Open CloudServer
  ☆24Updated 5 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆97Updated 5 years ago
• blackmesalabs / MesaBusProtocol
  Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
  ☆35Updated 9 months ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• colognechip / gatemate_ila
  The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …
  ☆53Updated 3 months ago
• ECP5-PCIe / ECP5-PCIe
  Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
  ☆98Updated 2 years ago
• paulscherrerinstitute / xvcSupport
  ☆18Updated 4 years ago
• openXC7 / xc7k325t-blinky-nextpnr
  ☆45Updated 2 years ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆66Updated last month
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆80Updated last year
• SMB784 / SQRL_quickstart
  Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs
  ☆69Updated 3 years ago
• EvgenyMuryshkin / QuokkaEvaluation
  Example projects for Quokka FPGA toolkit
  ☆37Updated 2 years ago