☆18May 24, 2021Updated 5 years ago
Alternatives and similar repositories for otma-pin-re
Users that are interested in otma-pin-re are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆56Oct 30, 2021Updated 4 years ago
- ☆16Oct 30, 2021Updated 4 years ago
- Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP☆68Nov 12, 2022Updated 3 years ago
- Stratix V PCIe Ledblink (for usage in Microsoft Storey Peak boards)☆23Aug 2, 2021Updated 5 years ago
- Port of Brian Bennet's NES Emulator for the second generation Panologic thin client☆13Apr 21, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆60Mar 27, 2022Updated 4 years ago
- ☆10Nov 2, 2023Updated 2 years ago
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 5 years ago
- Setup instructions for Quartus 21.x and Questa for Ubuntu 20.04☆21Mar 16, 2024Updated 2 years ago
- Verilog+VHDL Hierarchy Management tool ( IDE ) wraps around Vim, runs in Linux terminal window.☆13Jan 15, 2017Updated 9 years ago
- Hardware-side component of Hastlayer for Microsoft Project Catapult FPGAs. See https://hastlayer.com for details.☆13Mar 28, 2020Updated 6 years ago
- decode bits into bytes☆47Apr 30, 2020Updated 6 years ago
- Nvidia/Mellanox Innova-2 Flex Open Programmable SmartNIC Setup and Usage Notes for XCKU15P FPGA Development☆90Jul 23, 2026Updated 2 months ago
- Utilities for the ECP5 FPGA☆17Aug 5, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Create trimmed docker image that contains only parts of the original file system of an existing docker image while still working.☆14Feb 6, 2019Updated 7 years ago
- ☆14Feb 18, 2021Updated 5 years ago
- ESP8266 Xilinx Virtual Cable - wifi JTAG☆41Apr 21, 2021Updated 5 years ago
- AMI BMC image generator and decomposer☆14Aug 4, 2016Updated 10 years ago
- My KiCAD libraries☆22Sep 3, 2026Updated 3 weeks ago
- A Chisel implementation for an FPGA Pin Finder thru UART☆17Sep 24, 2024Updated 2 years ago
- Runs AWS graviton2 images on intel, with native-speed compile times☆55Sep 1, 2021Updated 5 years ago
- Migrated to Codeberg☆10Apr 21, 2024Updated 2 years ago
- Collected resources and getting started with Azure PCIe FPGA device☆53Feb 24, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A toy BEAM Virtual Machine - in Rust☆16Jun 21, 2017Updated 9 years ago
- Converting ss/vmess to clash proxies☆10May 19, 2022Updated 4 years ago
- A DSL for Linear Temporal Logic + Interface with Z3 for solving☆11Mar 12, 2015Updated 11 years ago
- Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs☆70Nov 21, 2021Updated 4 years ago
- An example Windows 10 UMDF driver for the sole purpose of sending MMIO to BAR regions of an FPGA☆21May 4, 2018Updated 8 years ago
- Various examples for Chisel HDL☆33Mar 20, 2022Updated 4 years ago
- An update of the original UCT IMS client project☆13Jun 21, 2022Updated 4 years ago
- ☆21Dec 9, 2018Updated 7 years ago
- Verilog Language Extension for Visual Studio☆20Sep 8, 2026Updated 2 weeks ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Various JTAG boundary scan tools☆37Dec 1, 2020Updated 5 years ago
- Hogge Phase EMFI Detector☆15Jun 16, 2021Updated 5 years ago
- ☆15Feb 15, 2022Updated 4 years ago
- Router 1 x 3 verilog implementation☆15Sep 5, 2021Updated 5 years ago
- A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad☆15Jan 15, 2024Updated 2 years ago
- ☆26Feb 15, 2025Updated last year
- Hardware-based VMAF☆11Aug 29, 2025Updated last year