AWGN signal generator IP for FPGA implemented by Verilog HDL with Fmax up to 320MHz on Xilinx Virtex Ultra-Scale FPGA.
☆16Sep 20, 2020Updated 6 years ago
Alternatives and similar repositories for awgn_boxmuller
Users that are interested in awgn_boxmuller are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- FPGA Additive White Gaussian Noise Generator Using the Box Mueller Method☆11Oct 7, 2016Updated 10 years ago
- Gaussian noise generator Verilog IP core☆35Jul 5, 2026Updated 3 months ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆84Apr 28, 2023Updated 3 years ago
- A project demonstrate how to config ad9361 to TX mode☆13Dec 9, 2018Updated 7 years ago
- 用Verilog语言编写,实现2FSK,2PSK, 2DPSK, QPSK调制解调☆44Mar 15, 2019Updated 7 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆11Apr 25, 2020Updated 6 years ago
- 《CPU设计实战》汪文祥 全书代码 完整版 Loongarch版☆19May 14, 2026Updated 5 months ago
- Repository of Matlab tools for analysis of wireline signal integrity and transceiver simulation☆14Apr 25, 2020Updated 6 years ago
- Basic Simulink Blocks for modeling CDRs and PLLs☆16Apr 25, 2020Updated 6 years ago
- SISO vector decoder for IRA-LDPC codes in VHDL☆12Oct 18, 2022Updated 4 years ago
- Kalman filter of GPS data. Zero dependency☆12Apr 1, 2025Updated last year
- VHDL implementation of carrier phase recovery (CPR) techniques for coherent optical systems☆16Dec 6, 2020Updated 5 years ago
- Heston implementation for Zynq with Vivado HLS☆16Jun 30, 2015Updated 11 years ago
- USB 1.1 PHY☆12Jul 17, 2014Updated 12 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Thesis: Custom Filter Designs on the Red Pitaya☆13Jan 8, 2018Updated 8 years ago
- A verilog FPGA Interface for AXI4_Lite from Slave side☆13Jun 14, 2020Updated 6 years ago
- 基于FPGA的数字调制系统 :实现m序列作为信源,并通过按键来选择移位相加的初始值和步进值以及实现2ASK、2FSK、2PSK☆25Jun 4, 2021Updated 5 years ago
- My code repositry for common use.☆23Dec 31, 2021Updated 4 years ago
- Welcome to the Digital_Modulation_Py repository! This repository provides digital modulation techniques, including QPSK,PSK and QAM,using…☆29Mar 7, 2024Updated 2 years ago
- Fractional interpolation using a Farrow structure☆10Oct 11, 2023Updated 3 years ago
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆16Nov 8, 2025Updated 11 months ago
- Standalone application based on ADI hdl and no_OS for ANTSDR.☆30Mar 27, 2025Updated last year
- Hardware implementation (Verilog) and Software Implementation (MATLAB) of IEEE's 802.11a standard for transmitter and receiver sides of W…☆14Feb 19, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- This project implements a Hamming encoder and decoder using Verilog to correct single-bit errors in data transmission. It includes Verilo…☆11Aug 2, 2024Updated 2 years ago
- UDP and TCP echo servers using lwIP RAW API running on Xilinx Zynq Platform☆12Apr 15, 2014Updated 12 years ago
- Software defined radio on a STM32H7 microcontroller☆15Sep 17, 2023Updated 3 years ago
- SAR Backprojection Implementations for the GOTCHA data set☆18Jan 28, 2024Updated 2 years ago
- Turbo coder and decoder☆12Oct 11, 2023Updated 3 years ago
- Low Density Parity Check Decoder☆19Sep 12, 2016Updated 10 years ago
- OFDM baseband processing systerm based on IEEE 802.11a☆13Aug 3, 2020Updated 6 years ago
- ☆10May 3, 2022Updated 4 years ago
- ☆31Jan 23, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Capital gains calculator☆23Jun 15, 2025Updated last year
- common C++ idioms and techniques☆23Oct 7, 2025Updated last year
- Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP☆68Nov 12, 2022Updated 3 years ago
- ☆14Nov 28, 2022Updated 3 years ago
- Obtain detected points from IWR6843aop.☆17Mar 16, 2021Updated 5 years ago
- HDL code for a complex multiplier with AXI stream interface☆17Mar 18, 2026Updated 7 months ago
- ☆13Jul 29, 2016Updated 10 years ago