Alternatives and similar repositories for ocs-tray-mezzanine-adapter

Users that are interested in ocs-tray-mezzanine-adapter are comparing it to the libraries listed below

• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• hamsternz / MMCM_GPSDO
  An all-digital GPS disciplined oscillator using MMCM phase shift.
  ☆30Updated 2 years ago
• openXC7 / xc7k325t-blinky-nextpnr
  ☆45Updated 2 years ago
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆57Updated 4 years ago
• joshajohnson / ecp5-mini
  ECP5 FPGA in an "S7 Mini" form factor
  ☆80Updated 3 years ago
• hydrausb3 / wch-ch569-serdes
  WCH CH569 SerDes Reverse Engineering
  ☆26Updated 2 years ago
• 360nosc0pe / scope
  Siglent SDS1x0xX-E FPGA bitstreams
  ☆41Updated 6 months ago
• enjoy-digital / litex-acorn-baseboard
  LiteX development baseboards arround the SQRL Acorn.
  ☆67Updated 3 months ago
• bvernoux / kicad_rf
  KiCad RF Stuff
  ☆15Updated 3 years ago
• smunaut / iua
  ice40 USB Analyzer
  ☆58Updated 4 years ago
• j-marjanovic / jtag-quartus-ft232h
  ☆46Updated 3 years ago
• emard / flearadio
  Digital FM Radio Receiver for FPGA
  ☆61Updated 9 years ago
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆55Updated 2 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated last year
• hansfbaier / colorlight-qmtech-adapter
  Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor
  ☆19Updated 2 years ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆42Updated 2 weeks ago
• antmicro / artix-dc-scm
  Experimental Xilinx Artix-7 driven Data Center Security Communication Module
  ☆53Updated last year
• pergola-fpga / pergola
  Low-cost ECP5 FPGA development board
  ☆77Updated 4 years ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆30Updated 3 years ago
• brouhaha / xchange
  Change part number or package in a Xilinx 7-series FPGA bitstream
  ☆39Updated 5 years ago
• no2fpga / no2muacm
  Drop In USB CDC ACM core for iCE40 FPGA
  ☆34Updated 3 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆92Updated 5 years ago
• sparrowgrine / prjtritium
  ☆22Updated 3 years ago
• amaranth-farm / ch569-hspi-fpga
  Gateware to communicate with the high speed parallel interface (HSPI) of the CH569 with a FPGA
  ☆32Updated 2 years ago
• paulscherrerinstitute / xvcSupport
  ☆18Updated 4 years ago
• gtortone / esp-xvcd
  ESP8266 Xilinx Virtual Cable - wifi JTAG
  ☆39Updated 4 years ago
• loxodes / tdr
  Prototype time domain reflectometer/sampling oscilloscope
  ☆52Updated 6 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 5 years ago
• emeb / rpi_rxadc
  An SDR for Raspberry Pi
  ☆35Updated 4 years ago
• ECP5-PCIe / ECP5-PCIe
  Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
  ☆97Updated 2 years ago